VSHUFF32x4/VSHUFF64x2/VSHUFI32x4/VSHUFI64x2—Shuffle Packed Values at 128-bit GranularityInstruction Operand EncodingDescription256-bit Version: Moves one of the two 128-bit packed single-precision floating-point values from the first source operand (second operand) into the low 128-bit of the destination operand (first operand); moves one of the two packed 128-bit floating-point values from the second source operand (third operand) into the high 128-bit of the destination operand. The selector operand (third operand) determines which values are moved to the destination operand.512-bit Version: Moves two of the four 128-bit packed single-precision floating-point values from the first source operand (second operand) into the low 256-bit of each double qword of the destination operand (first operand); moves two of the four packed 128-bit floating-point values from the second source operand (third operand) into the high 256-bit of the destination operand. The selector operand (third operand) determines which values are moved to the destination operand.The first source operand is a vector register. The second source operand can be a ZMM register, a 512-bit memory location or a 512-bit vector broadcasted from a 32/64-bit memory location. The destination operand is a vector register.The writemask updates the destination operand with the granularity of 32/64-bit data elements.Opcode/InstructionOp / En64/32 bit Mode SupportCPUID Feature FlagDescriptionEVEX.256.66.0F3A.W0 23 /r ibVSHUFF32X4 ymm1{k1}{z}, ymm2, ymm3/m256/m32bcst, imm8AV/VAVX512VLAVX512FShuffle 128-bit packed single-precision floating-point values selected by imm8 from ymm2 and ymm3/m256/m32bcst and place results in ymm1 subject to writemask k1.EVEX.512.66.0F3A.W0 23 /r ibVSHUFF32x4 zmm1{k1}{z}, zmm2, zmm3/m512/m32bcst, imm8AV/VAVX512FShuffle 128-bit packed single-precision floating-point values selected by imm8 from zmm2 and zmm3/m512/m32bcst and place results in zmm1 subject to writemask k1.EVEX.256.66.0F3A.W1 23 /r ibVSHUFF64X2 ymm1{k1}{z}, ymm2, ymm3/m256/m64bcst, imm8AV/VAVX512VLAVX512FShuffle 128-bit packed double-precision floating-point values selected by imm8 from ymm2 and ymm3/m256/m64bcst and place results in ymm1 subject to writemask k1.EVEX.512.66.0F3A.W1 23 /r ibVSHUFF64x2 zmm1{k1}{z}, zmm2, zmm3/m512/m64bcst, imm8AV/VAVX512FShuffle 128-bit packed double-precision floating-point values selected by imm8 from zmm2 and zmm3/m512/m64bcst and place results in zmm1 subject to writemask k1.EVEX.256.66.0F3A.W0 43 /r ibVSHUFI32X4 ymm1{k1}{z}, ymm2, ymm3/m256/m32bcst, imm8AV/VAVX512VLAVX512FShuffle 128-bit packed double-word values selected by imm8 from ymm2 and ymm3/m256/m32bcst and place results in ymm1 subject to writemask k1.EVEX.512.66.0F3A.W0 43 /r ibVSHUFI32x4 zmm1{k1}{z}, zmm2, zmm3/m512/m32bcst, imm8AV/VAVX512FShuffle 128-bit packed double-word values selected by imm8 from zmm2 and zmm3/m512/m32bcst and place results in zmm1 subject to writemask k1.EVEX.256.66.0F3A.W1 43 /r ibVSHUFI64X2 ymm1{k1}{z}, ymm2, ymm3/m256/m64bcst, imm8AV/VAVX512VLAVX512FShuffle 128-bit packed quad-word values selected by imm8 from ymm2 and ymm3/m256/m64bcst and place results in ymm1 subject to writemask k1.EVEX.512.66.0F3A.W1 43 /r ibVSHUFI64x2 zmm1{k1}{z}, zmm2, zmm3/m512/m64bcst, imm8AV/VAVX512FShuffle 128-bit packed quad-word values selected by imm8 from zmm2 and zmm3/m512/m64bcst and place results in zmm1 subject to writemask k1.Op/EnTuple TypeOperand 1Operand 2Operand 3Operand 4AFullModRM:reg (w)EVEX.vvvv (r)ModRM:r/m (r)NA
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