VPMOVQW/VPMOVSQW/VPMOVUSQW—Down Convert QWord to WordInstruction Operand EncodingDescription VPMOVQW down converts 64-bit integer elements in the source operand (the second operand) into packed words using truncation. VPMOVSQW converts signed 64-bit integers into packed signed words using signed saturation. VPMOVUSQW convert unsigned quad-word values into unsigned word values using unsigned saturation. The source operand is a ZMM/YMM/XMM register. The destination operand is a XMM register or a 128/64/32-bit memory location.Down-converted word elements are written to the destination operand (the first operand) from the least-significant word. Word elements of the destination operand are updated according to the writemask. Bits (MAXVL-1:128/64/32) of the register destination are zeroed.EVEX.vvvv is reserved and must be 1111b otherwise instructions will #UD.Opcode/InstructionOp / En64/32 bit Mode SupportCPUID Feature FlagDescriptionEVEX.128.F3.0F38.W0 34 /rVPMOVQW xmm1/m32 {k1}{z}, xmm2AV/VAVX512VLAVX512FConverts 2 packed quad-word integers from xmm2into 2 packed word integers in xmm1/m32 with truncation under writemask k1.EVEX.128.F3.0F38.W0 24 /rVPMOVSQW xmm1/m32 {k1}{z}, xmm2AV/VAVX512VLAVX512FConverts 8 packed signed quad-word integers from zmm2 into 8 packed signed word integers in xmm1/m32 usingsigned saturation under writemask k1.EVEX.128.F3.0F38.W0 14 /rVPMOVUSQW xmm1/m32 {k1}{z}, xmm2AV/VAVX512VLAVX512FConverts 2 packed unsigned quad-word integers from xmm2 into 2 packed unsigned word integers in xmm1/m32 usingunsigned saturation under writemask k1.EVEX.256.F3.0F38.W0 34 /rVPMOVQW xmm1/m64 {k1}{z}, ymm2AV/VAVX512VLAVX512FConverts 4 packed quad-word integers from ymm2into 4 packed word integers in xmm1/m64 with truncation under writemask k1.EVEX.256.F3.0F38.W0 24 /rVPMOVSQW xmm1/m64 {k1}{z}, ymm2AV/VAVX512VLAVX512FConverts 4 packed signed quad-word integers from ymm2 into 4 packed signed word integers in xmm1/m64 usingsigned saturation under writemask k1.EVEX.256.F3.0F38.W0 14 /rVPMOVUSQW xmm1/m64 {k1}{z}, ymm2AV/VAVX512VLAVX512FConverts 4 packed unsigned quad-word integers from ymm2 into 4 packed unsigned word integers in xmm1/m64 usingunsigned saturation under writemask k1.EVEX.512.F3.0F38.W0 34 /rVPMOVQW xmm1/m128 {k1}{z}, zmm2AV/VAVX512FConverts 8 packed quad-word integers from zmm2into 8 packed word integers in xmm1/m128 with truncation under writemask k1.EVEX.512.F3.0F38.W0 24 /rVPMOVSQW xmm1/m128 {k1}{z}, zmm2AV/VAVX512FConverts 8 packed signed quad-word integers from zmm2 into 8 packed signed word integers in xmm1/m128 usingsigned saturation under writemask k1.EVEX.512.F3.0F38.W0 14 /rVPMOVUSQW xmm1/m128 {k1}{z}, zmm2AV/VAVX512FConverts 8 packed unsigned quad-word integers from zmm2 into 8 packed unsigned word integers in xmm1/m128 usingunsigned saturation under writemask k1.Op/EnTuple TypeOperand 1Operand 2Operand 3Operand 4AQuarter MemModRM:r/m (w)ModRM:reg (r)NANA
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