image/svg+xmlVPERM2I128 — Permute Integer ValuesInstruction Operand EncodingDescriptionPermute 128 bit integer data from the first source operand (second operand) and second source operand (third operand) using bits in the 8-bit immediate and store results in the destination operand (first operand). The first source operand is a YMM register, the second source operand is a YMM register or a 256-bit memory location, and the destination operand is a YMM register.Figure 5-22. VPERM2I128 OperationImm8[1:0] select the source for the first destination 128-bit field, imm8[5:4] select the source for the second destination field. If imm8[3] is set, the low 128-bit field is zeroed. If imm8[7] is set, the high 128-bit field is zeroed.VEX.L must be 1, otherwise the instruction will #UD.Opcode/InstructionOp/ En64/32-bit ModeCPUID Feature FlagDescriptionVEX.256.66.0F3A.W0 46 /r ibVPERM2I128 ymm1, ymm2, ymm3/m256, imm8RVMIV/VAVX2Permute 128-bit integer data in ymm2 and ymm3/mem using controls from imm8 and store result in ymm1.Op/EnOperand 1Operand 2Operand 3Operand 4RVMIModRM:reg (w)VEX.vvvv (r)ModRM:r/m (r)Imm8DESTSRC1X0X1X0, X1, Y0, or Y1Y0Y1X0, X1, Y0, or Y1SRC2

image/svg+xmlOperationVPERM2I128CASE IMM8[1:0] of 0: DEST[127:0] := SRC1[127:0]1: DEST[127:0] := SRC1[255:128]2: DEST[127:0] := SRC2[127:0]3: DEST[127:0] := SRC2[255:128]ESACCASE IMM8[5:4] of 0: DEST[255:128] := SRC1[127:0]1: DEST[255:128] := SRC1[255:128]2: DEST[255:128] := SRC2[127:0]3: DEST[255:128] := SRC2[255:128]ESACIF (imm8[3])DEST[127:0] := 0FIIF (imm8[7])DEST[255:128] := 0FIIntel C/C++ Compiler Intrinsic EquivalentVPERM2I128: __m256i _mm256_permute2x128_si256 (__m256i a, __m256i b, int control)SIMD Floating-Point ExceptionsNoneOther ExceptionsSee Table2-23, “Type 6 Class Exception Conditions”; additionally:#UDIf VEX.L = 0,If VEX.W = 1.

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