VPBROADCASTM—Broadcast Mask to Vector Register Instruction Operand EncodingDescriptionBroadcasts the zero-extended 64/32 bit value of the low byte/word of the source operand (the second operand) to each 64/32 bit element of the destination operand (the first operand). The source operand is an opmask register. The destination operand is a ZMM register (EVEX.512), YMM register (EVEX.256), or XMM register (EVEX.128).EVEX.vvvv is reserved and must be 1111b otherwise instructions will #UD.OperationVPBROADCASTMB2Q(KL, VL) = (2, 128), (4, 256), (8, 512)FOR j := 0 TO KL-1i := j*64DEST[i+63:i] := ZeroExtend(SRC[7:0])ENDFORDEST[MAXVL-1:VL] := 0VPBROADCASTMW2D(KL, VL) = (4, 128), (8, 256),(16, 512)FOR j := 0 TO KL-1i := j*32DEST[i+31:i] := ZeroExtend(SRC[15:0])ENDFORDEST[MAXVL-1:VL] := 0Opcode/InstructionOp/En64/32 bit Mode SupportCPUID Feature FlagDescriptionEVEX.128.F3.0F38.W1 2A /rVPBROADCASTMB2Q xmm1, k1RM V/V AVX512VLAVX512CDBroadcast low byte value in k1 to two locations in xmm1.EVEX.256.F3.0F38.W1 2A /rVPBROADCASTMB2Q ymm1, k1RM V/V AVX512VLAVX512CDBroadcast low byte value in k1 to four locations in ymm1.EVEX.512.F3.0F38.W1 2A /rVPBROADCASTMB2Q zmm1, k1RM V/V AVX512CDBroadcast low byte value in k1 to eight locations in zmm1.EVEX.128.F3.0F38.W0 3A /rVPBROADCASTMW2D xmm1, k1RM V/V AVX512VLAVX512CDBroadcast low word value in k1 to four locations in xmm1.EVEX.256.F3.0F38.W0 3A /rVPBROADCASTMW2D ymm1, k1RM V/V AVX512VLAVX512CDBroadcast low word value in k1 to eight locations in ymm1.EVEX.512.F3.0F38.W0 3A /rVPBROADCASTMW2D zmm1, k1RM V/V AVX512CDBroadcast low word value in k1 to sixteen locations in zmm1.Op/EnOperand 1Operand 2Operand 3Operand 4RMModRM:reg (w)ModRM:r/m (r)NANA
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