VINSERTF128/VINSERTF32x4/VINSERTF64x2/VINSERTF32x8/VINSERTF64x4—Insert Packed Floating-Point ValuesInstruction Operand EncodingDescriptionVINSERTF128/VINSERTF32x4 and VINSERTF64x2 insert 128-bits of packed floating-point values from the second source operand (the third operand) into the destination operand (the first operand) at an 128-bit granularity offset multiplied by imm8[0] (256-bit) or imm8[1:0]. The remaining portions of the destination operand are copied from the corresponding fields of the first source operand (the second operand). The second source operand can be either an XMM register or a 128-bit memory location. The destination and first source operands are vector registers.VINSERTF32x4: The destination operand is a ZMM/YMM register and updated at 32-bit granularity according to the writemask. The high 6/7 bits of the immediate are ignored. VINSERTF64x2: The destination operand is a ZMM/YMM register and updated at 64-bit granularity according to the writemask. The high 6/7 bits of the immediate are ignored. VINSERTF32x8 and VINSERTF64x4 inserts 256-bits of packed floating-point values from the second source operand (the third operand) into the destination operand (the first operand) at a 256-bit granular offset multiplied by imm8[0]. The remaining portions of the destination are copied from the corresponding fields of the first source operand (the second operand). The second source operand can be either an YMM register or a 256-bit memory location. The high 7 bits of the immediate are ignored. The destination operand is a ZMM register and updated at 32/64-bit granularity according to the writemask.Opcode/InstructionOp / En64/32 bit Mode SupportCPUID Feature FlagDescriptionVEX.256.66.0F3A.W0 18 /r ibVINSERTF128 ymm1, ymm2, xmm3/m128, imm8AV/VAVXInsert 128 bits of packed floating-point values from xmm3/m128 and the remaining values from ymm2 into ymm1.EVEX.256.66.0F3A.W0 18 /r ibVINSERTF32X4 ymm1 {k1}{z}, ymm2, xmm3/m128, imm8CV/VAVX512VLAVX512FInsert 128 bits of packed single-precision floating-point values from xmm3/m128 and the remaining values from ymm2 into ymm1 under writemask k1.EVEX.512.66.0F3A.W0 18 /r ibVINSERTF32X4 zmm1 {k1}{z}, zmm2, xmm3/m128, imm8CV/VAVX512FInsert 128 bits of packed single-precision floating-point values from xmm3/m128 and the remaining values from zmm2 into zmm1 under writemask k1.EVEX.256.66.0F3A.W1 18 /r ibVINSERTF64X2 ymm1 {k1}{z}, ymm2, xmm3/m128, imm8BV/VAVX512VLAVX512DQInsert 128 bits of packed double-precision floating-point values from xmm3/m128 and the remaining values from ymm2 into ymm1 under writemask k1.EVEX.512.66.0F3A.W1 18 /r ibVINSERTF64X2 zmm1 {k1}{z}, zmm2, xmm3/m128, imm8BV/VAVX512DQInsert 128 bits of packed double-precision floating-point values from xmm3/m128 and the remaining values from zmm2 into zmm1 under writemask k1.EVEX.512.66.0F3A.W0 1A /r ibVINSERTF32X8 zmm1 {k1}{z}, zmm2, ymm3/m256, imm8DV/VAVX512DQInsert 256 bits of packed single-precision floating-point values from ymm3/m256 and the remaining values from zmm2 into zmm1 under writemask k1.EVEX.512.66.0F3A.W1 1A /r ibVINSERTF64X4 zmm1 {k1}{z}, zmm2, ymm3/m256, imm8CV/VAVX512FInsert 256 bits of packed double-precision floating-point values from ymm3/m256 and the remaining values from zmm2 into zmm1 under writemask k1.Op/EnTuple TypeOperand 1Operand 2Operand 3Operand 4ANAModRM:reg (w)VEX.vvvv (r)ModRM:r/m (r)Imm8BTuple2ModRM:reg (w)EVEX.vvvv (r)ModRM:r/m (r)Imm8CTuple4ModRM:reg (w)EVEX.vvvv (r)ModRM:r/m (r)Imm8DTuple8ModRM:reg (w)EVEX.vvvv (r)ModRM:r/m (r)Imm8
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