VEXTRACTF128/VEXTRACTF32x4/VEXTRACTF64x2/VEXTRACTF32x8/VEXTRACTF64x4—Extract Packed Floating-Point ValuesInstruction Operand EncodingDescriptionVEXTRACTF128/VEXTRACTF32x4 and VEXTRACTF64x2 extract 128-bits of single-precision floating-point values from the source operand (the second operand) and store to the low 128-bit of the destination operand (the first operand). The 128-bit data extraction occurs at an 128-bit granular offset specified by imm8[0] (256-bit) or imm8[1:0] as the multiply factor. The destination may be either a vector register or an 128-bit memory location.VEXTRACTF32x4: The low 128-bit of the destination operand is updated at 32-bit granularity according to the writemask.VEXTRACTF32x8 and VEXTRACTF64x4 extract 256-bits of double-precision floating-point values from the source operand (second operand) and store to the low 256-bit of the destination operand (the first operand). The 256-bit data extraction occurs at an 256-bit granular offset specified by imm8[0] (256-bit) or imm8[0] as the multiply factor The destination may be either a vector register or a 256-bit memory location.VEXTRACTF64x4: The low 256-bit of the destination operand is updated at 64-bit granularity according to the writemask.VEX.vvvv and EVEX.vvvv are reserved and must be 1111b otherwise instructions will #UD.The high 6 bits of the immediate are ignored.If VEXTRACTF128 is encoded with VEX.L= 0, an attempt to execute the instruction encoded with VEX.L= 0 will cause an #UD exception.Opcode/InstructionOp / En64/32 bit Mode SupportCPUID Feature FlagDescriptionVEX.256.66.0F3A.W0 19 /r ibVEXTRACTF128 xmm1/m128, ymm2, imm8AV/VAVXExtract 128 bits of packed floating-point values from ymm2 and store results in xmm1/m128.EVEX.256.66.0F3A.W0 19 /r ibVEXTRACTF32X4 xmm1/m128 {k1}{z}, ymm2, imm8CV/VAVX512VLAVX512FExtract 128 bits of packed single-precision floating-point values from ymm2 and store results in xmm1/m128 subject to writemask k1.EVEX.512.66.0F3A.W0 19 /r ibVEXTRACTF32x4 xmm1/m128 {k1}{z}, zmm2, imm8CV/VAVX512FExtract 128 bits of packed single-precision floating-point values from zmm2 and store results in xmm1/m128 subject to writemask k1.EVEX.256.66.0F3A.W1 19 /r ibVEXTRACTF64X2 xmm1/m128 {k1}{z}, ymm2, imm8BV/VAVX512VLAVX512DQExtract 128 bits of packed double-precision floating-point values from ymm2 and store results in xmm1/m128 subject to writemask k1.EVEX.512.66.0F3A.W1 19 /r ibVEXTRACTF64X2 xmm1/m128 {k1}{z}, zmm2, imm8BV/VAVX512DQExtract 128 bits of packed double-precision floating-point values from zmm2 and store results in xmm1/m128 subject to writemask k1.EVEX.512.66.0F3A.W0 1B /r ibVEXTRACTF32X8 ymm1/m256 {k1}{z}, zmm2, imm8DV/VAVX512DQExtract 256 bits of packed single-precision floating-point values from zmm2 and store results in ymm1/m256 subject to writemask k1.EVEX.512.66.0F3A.W1 1B /r ibVEXTRACTF64x4 ymm1/m256 {k1}{z}, zmm2, imm8CV/VAVX512FExtract 256 bits of packed double-precision floating-point values from zmm2 and store results in ymm1/m256 subject to writemask k1.Op/EnTuple TypeOperand 1Operand 2Operand 3Operand 4ANAModRM:r/m (w)ModRM:reg (r)Imm8NABTuple2ModRM:r/m (w)ModRM:reg (r)Imm8NACTuple4ModRM:r/m (w)ModRM:reg (r)Imm8NADTuple8ModRM:r/m (w)ModRM:reg (r)Imm8NA
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