image/svg+xmlTEST—Logical CompareInstruction Operand EncodingDescriptionComputes the bit-wise logical AND of first operand (source 1 operand) and the second operand (source 2 operand) and sets the SF, ZF, and PF status flags according to the result. The result is then discarded.In 64-bit mode, using a REX prefix in the form of REX.R permits access to additional registers (R8-R15). Using a REX prefix in the form of REX.W promotes operation to 64 bits. See the summary chart at the beginning of this section for encoding data and limits.OpcodeInstructionOp/ En64-Bit ModeCompat/Leg ModeDescriptionA8ibTEST AL, imm8IValid ValidAND imm8 with AL; set SF, ZF, PF according to result.A9 iwTEST AX, imm16IValid ValidAND imm16 with AX; set SF, ZF, PF according to result.A9 idTEST EAX, imm32IValid ValidAND imm32 with EAX; set SF, ZF, PF according to result.REX.W + A9 idTEST RAX, imm32IValid N.E.AND imm32 sign-extended to 64-bits with RAX; set SF, ZF, PF according to result.F6 /0 ibTEST r/m8, imm8MIValid ValidAND imm8 with r/m8; set SF, ZF, PF according to result.REX + F6 /0 ibTEST r/m8*, imm8MIValid N.E.AND imm8 with r/m8; set SF, ZF, PF according to result.F7 /0 iwTEST r/m16, imm16MIValid ValidAND imm16 with r/m16; set SF, ZF, PF according to result.F7 /0 idTEST r/m32, imm32MIValid ValidAND imm32 with r/m32; set SF, ZF, PF according to result.REX.W + F7 /0 idTEST r/m64, imm32MIValid N.E.AND imm32 sign-extended to 64-bits with r/m64; set SF, ZF, PF according to result.84 /rTEST r/m8, r8MRValid ValidAND r8 with r/m8; set SF, ZF, PF according to result.REX + 84 /rTEST r/m8*, r8*MRValid N.E.AND r8 with r/m8; set SF, ZF, PF according to result.85 /rTEST r/m16, r16MRValid ValidAND r16 with r/m16; set SF, ZF, PF according to result.85 /rTEST r/m32, r32MRValid ValidAND r32 with r/m32; set SF, ZF, PF according to result.REX.W + 85 /rTEST r/m64, r64MRValid N.E.AND r64 with r/m64; set SF, ZF, PF according to result.NOTES:*In 64-bit mode, r/m8 can not be encoded to access the following byte registers if a REX prefix is used: AH, BH, CH, DH. Op/EnOperand 1Operand 2Operand 3Operand 4IAL/AX/EAX/RAXimm8/16/32NANAMIModRM:r/m (r)imm8/16/32NANAMRModRM:r/m (r)ModRM:reg (r)NANA

image/svg+xmlOperationTEMP := SRC1 AND SRC2;SF := MSB(TEMP);IF TEMP = 0THEN ZF := 1;ELSE ZF := 0;FI:PF := BitwiseXNOR(TEMP[0:7]);CF := 0;OF := 0;(* AF is undefined *)Flags AffectedThe OF and CF flags are set to 0. The SF, ZF, and PF flags are set according to the result (see the “Operation” section above). The state of the AF flag is undefined.Protected Mode Exceptions#GP(0)If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.If the DS, ES, FS, or GS register contains a NULL segment selector.#SS(0)If a memory operand effective address is outside the SS segment limit.#PF(fault-code)If a page fault occurs.#AC(0)If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3.#UD If the LOCK prefix is used.Real-Address Mode Exceptions#GPIf a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.#SSIf a memory operand effective address is outside the SS segment limit.#UD If the LOCK prefix is used.Virtual-8086 Mode Exceptions#GP(0)If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.#SS(0)If a memory operand effective address is outside the SS segment limit.#PF(fault-code)If a page fault occurs.#AC(0)If alignment checking is enabled and an unaligned memory reference is made.#UD If the LOCK prefix is used.Compatibility Mode ExceptionsSame exceptions as in protected mode.64-Bit Mode Exceptions#SS(0)If a memory address referencing the SS segment is in a non-canonical form.#GP(0)If the memory address is in a non-canonical form.#PF(fault-code)If a page fault occurs.#AC(0)If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3.#UD If the LOCK prefix is used.

This UNOFFICIAL reference was generated from the official Intel® 64 and IA-32 Architectures Software Developer’s Manual by a dumb script. There is no guarantee that some parts aren't mangled or broken and is distributed WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.