image/svg+xmlSUB—SubtractInstruction Operand EncodingDescriptionSubtracts the second operand (source operand) from the first operand (destination operand) and stores the result in the destination operand. The destination operand can be a register or a memory location; the source operand can be an immediate, register, or memory location. (However, two memory operands cannot be used in one instruction.) When an immediate value is used as an operand, it is sign-extended to the length of the destination operand format.OpcodeInstructionOp/ En64-Bit ModeCompat/Leg ModeDescription2C ibSUB AL, imm8IValid ValidSubtract imm8 from AL.2D iwSUB AX, imm16IValid ValidSubtract imm16 from AX.2D idSUB EAX, imm32IValid ValidSubtract imm32 from EAX.REX.W + 2D idSUB RAX, imm32IValid N.E.Subtract imm32 sign-extended to 64-bits from RAX.80 /5 ibSUB r/m8, imm8MIValid ValidSubtract imm8 from r/m8.REX + 80 /5 ibSUB r/m8*, imm8MIValid N.E.Subtract imm8 from r/m8.81 /5 iwSUB r/m16, imm16MIValid ValidSubtract imm16 from r/m16.81 /5 idSUB r/m32, imm32MIValid ValidSubtract imm32 from r/m32.REX.W + 81 /5 idSUB r/m64, imm32MIValid N.E.Subtract imm32 sign-extended to 64-bits from r/m64.83 /5 ibSUB r/m16, imm8MIValid ValidSubtract sign-extended imm8 from r/m16.83 /5 ibSUB r/m32, imm8MIValid ValidSubtract sign-extended imm8 from r/m32.REX.W + 83 /5 ibSUB r/m64, imm8MIValid N.E.Subtract sign-extended imm8 from r/m64.28 /rSUB r/m8, r8MRValid ValidSubtract r8 from r/m8.REX + 28 /rSUB r/m8*, r8*MRValid N.E.Subtract r8 from r/m8.29 /rSUB r/m16, r16MRValid ValidSubtract r16 from r/m16.29 /rSUB r/m32, r32MRValid ValidSubtract r32 from r/m32.REX.W + 29 /rSUB r/m64, r64MRValid N.E.Subtract r64 from r/m64.2A /rSUB r8, r/m8RMValid ValidSubtract r/m8 from r8.REX + 2A /rSUB r8*, r/m8*RMValid N.E.Subtract r/m8 from r8.2B /rSUB r16, r/m16RMValid ValidSubtract r/m16 from r16.2B /rSUB r32, r/m32RMValid ValidSubtract r/m32 from r32.REX.W + 2B /rSUB r64, r/m64RMValid N.E.Subtract r/m64 from r64.NOTES:*In 64-bit mode, r/m8 can not be encoded to access the following byte registers if a REX prefix is used: AH, BH, CH, DH. Op/EnOperand 1Operand 2Operand 3Operand 4IAL/AX/EAX/RAXimm8/16/32NANAMIModRM:r/m (r, w)imm8/16/32NANAMRModRM:r/m (r, w)ModRM:reg (r)NANARMModRM:reg (r, w)ModRM:r/m (r)NANA

image/svg+xmlThe SUB instruction performs integer subtraction. It evaluates the result for both signed and unsigned integer operands and sets the OF and CF flags to indicate an overflow in the signed or unsigned result, respectively. The SF flag indicates the sign of the signed result.In 64-bit mode, the instruction’s default operation size is 32 bits. Using a REX prefix in the form of REX.R permits access to additional registers (R8-R15). Using a REX prefix in the form of REX.W promotes operation to 64 bits. See the summary chart at the beginning of this section for encoding data and limits.This instruction can be used with a LOCK prefix to allow the instruction to be executed atomically.OperationDEST := (DEST – SRC);Flags AffectedThe OF, SF, ZF, AF, PF, and CF flags are set according to the result.Protected Mode Exceptions#GP(0)If the destination is located in a non-writable segment.If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.If the DS, ES, FS, or GS register contains a NULL segment selector.#SS(0)If a memory operand effective address is outside the SS segment limit.#PF(fault-code)If a page fault occurs.#AC(0)If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3.#UD If the LOCK prefix is used but the destination is not a memory operand.Real-Address Mode Exceptions#GPIf a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.#SSIf a memory operand effective address is outside the SS segment limit.#UD If the LOCK prefix is used but the destination is not a memory operand.Virtual-8086 Mode Exceptions#GP(0)If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.#SS(0)If a memory operand effective address is outside the SS segment limit.#PF(fault-code)If a page fault occurs.#AC(0)If alignment checking is enabled and an unaligned memory reference is made.#UD If the LOCK prefix is used but the destination is not a memory operand.Compatibility Mode ExceptionsSame exceptions as in protected mode.64-Bit Mode Exceptions#SS(0)If a memory address referencing the SS segment is in a non-canonical form.#GP(0)If the memory address is in a non-canonical form.#PF(fault-code)If a page fault occurs.#AC(0)If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3.#UD If the LOCK prefix is used but the destination is not a memory operand.

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