image/svg+xmlREP/REPE/REPZ/REPNE/REPNZ—Repeat String Operation PrefixOpcodeInstructionOp/ En64-Bit ModeCompat/Leg ModeDescriptionF3 6CREP INS m8, DXZOValid ValidInput (E)CX bytes from port DX into ES:[(E)DI].F3 6CREP INS m8, DXZOValidN.E.Input RCX bytes from port DX into [RDI].F3 6DREP INS m16, DXZOValid ValidInput (E)CX words from port DX into ES:[(E)DI.]F3 6DREP INS m32, DXZOValid ValidInput (E)CX doublewords from port DX into ES:[(E)DI].F3 6DREP INS r/m32, DXZOValidN.E.Input RCX default size from port DX into [RDI].F3 A4REP MOVS m8, m8ZOValid ValidMove (E)CX bytes from DS:[(E)SI] to ES:[(E)DI].F3 REX.W A4REP MOVS m8, m8ZOValidN.E.Move RCX bytes from [RSI] to [RDI].F3 A5REP MOVS m16, m16ZOValid ValidMove (E)CX words from DS:[(E)SI] to ES:[(E)DI].F3 A5REP MOVS m32, m32ZOValid ValidMove (E)CX doublewords from DS:[(E)SI] to ES:[(E)DI].F3 REX.W A5REP MOVS m64, m64ZOValidN.E.Move RCX quadwords from [RSI] to [RDI].F3 6EREP OUTS DX, r/m8ZOValid ValidOutput (E)CX bytes from DS:[(E)SI] to port DX.F3 REX.W 6EREP OUTS DX, r/m8*ZOValidN.E.Output RCX bytes from [RSI] to port DX.F3 6FREP OUTS DX, r/m16ZOValid ValidOutput (E)CX words from DS:[(E)SI] to port DX.F3 6FREP OUTS DX, r/m32ZOValid ValidOutput (E)CX doublewords from DS:[(E)SI] to port DX.F3 REX.W 6FREP OUTS DX, r/m32ZOValidN.E.Output RCX default size from [RSI] to port DX.F3 ACREP LODS ALZOValid ValidLoad (E)CX bytes from DS:[(E)SI] to AL.F3 REX.W ACREP LODS ALZOValidN.E.Load RCX bytes from [RSI] to AL.F3 ADREP LODS AXZOValid ValidLoad (E)CX words from DS:[(E)SI] to AX.F3 ADREP LODS EAXZOValid ValidLoad (E)CX doublewords from DS:[(E)SI] to EAX.F3 REX.W ADREP LODS RAXZOValidN.E.Load RCX quadwords from [RSI] to RAX.F3 AAREP STOS m8ZOValid ValidFill (E)CX bytes at ES:[(E)DI] with AL.F3 REX.W AAREP STOS m8ZOValidN.E.Fill RCX bytes at [RDI] with AL.F3 ABREP STOS m16ZOValid ValidFill (E)CX words at ES:[(E)DI] with AX.F3 ABREP STOS m32ZOValid ValidFill (E)CX doublewords at ES:[(E)DI] with EAX.F3 REX.W ABREP STOS m64ZOValidN.E.Fill RCX quadwords at [RDI] with RAX.F3 A6REPE CMPS m8, m8ZOValid ValidFind nonmatching bytes in ES:[(E)DI] and DS:[(E)SI].F3 REX.W A6REPE CMPS m8, m8ZOValidN.E.Find non-matching bytes in [RDI] and [RSI].F3 A7REPE CMPS m16, m16ZOValid ValidFind nonmatching words in ES:[(E)DI] and DS:[(E)SI].F3 A7REPE CMPS m32, m32ZOValid ValidFind nonmatching doublewords in ES:[(E)DI] and DS:[(E)SI].F3 REX.W A7REPE CMPS m64, m64ZOValidN.E.Find non-matching quadwords in [RDI] and [RSI].F3 AEREPE SCAS m8ZOValid ValidFind non-AL byte starting at ES:[(E)DI].F3 REX.W AEREPE SCAS m8ZOValidN.E.Find non-AL byte starting at [RDI].F3 AFREPE SCAS m16ZOValid ValidFind non-AX word starting at ES:[(E)DI].F3 AFREPE SCAS m32ZOValid ValidFind non-EAX doubleword starting at ES:[(E)DI].

image/svg+xmlInstruction Operand EncodingDescriptionRepeats a string instruction the number of times specified in the count register or until the indicated condition of the ZF flag is no longer met. The REP (repeat), REPE (repeat while equal), REPNE (repeat while not equal), REPZ (repeat while zero), and REPNZ (repeat while not zero) mnemonics are prefixes that can be added to one of the string instructions. The REP prefix can be added to the INS, OUTS, MOVS, LODS, and STOS instructions, and the REPE, REPNE, REPZ, and REPNZ prefixes can be added to the CMPS and SCAS instructions. (The REPZ and REPNZ prefixes are synonymous forms of the REPE and REPNE prefixes, respectively.) The F3H prefix is defined for the following instructions and undefined for the rest:•F3H as REP/REPE/REPZ for string and input/output instruction.•F3H is a mandatory prefix for POPCNT, LZCNT, and ADOX.The REP prefixes apply only to one string instruction at a time. To repeat a block of instructions, use the LOOP instruction or another looping construct. All of these repeat prefixes cause the associated instruction to be repeated until the count in register is decremented to 0. See Table 4-22.F3 REX.W AFREPE SCAS m64ZOValidN.E.Find non-RAX quadword starting at [RDI].F2 A6REPNE CMPS m8, m8ZOValid ValidFind matching bytes in ES:[(E)DI] and DS:[(E)SI].F2 REX.W A6REPNE CMPS m8, m8ZOValidN.E.Find matching bytes in [RDI] and [RSI].F2 A7REPNE CMPS m16, m16ZOValid ValidFind matching words in ES:[(E)DI] and DS:[(E)SI].F2 A7REPNE CMPS m32, m32ZOValid ValidFind matching doublewords in ES:[(E)DI] and DS:[(E)SI].F2 REX.W A7REPNE CMPS m64, m64ZOValidN.E.Find matching doublewords in [RDI] and [RSI].F2 AEREPNE SCAS m8ZOValid ValidFind AL, starting at ES:[(E)DI].F2 REX.W AEREPNE SCAS m8ZOValidN.E.Find AL, starting at [RDI].F2 AFREPNE SCAS m16ZOValid ValidFind AX, starting at ES:[(E)DI].F2 AFREPNE SCAS m32ZOValid ValidFind EAX, starting at ES:[(E)DI].F2 REX.W AFREPNE SCAS m64ZOValid N.E.Find RAX, starting at [RDI].NOTES:*In 64-bit mode, r/m8 can not be encoded to access the following byte registers if a REX prefix is used: AH, BH, CH, DH.Op/EnOperand 1Operand 2Operand 3Operand 4ZONANANANATable 4-22. Repeat PrefixesRepeat PrefixTermination Condition 1*Termination Condition 2REPRCX or (E)CX = 0 NoneREPE/REPZRCX or (E)CX = 0ZF = 0REPNE/REPNZRCX or (E)CX = 0 ZF = 1NOTES:*Count register is CX, ECX or RCX by default, depending on attributes of the operating modes.OpcodeInstructionOp/ En64-Bit ModeCompat/Leg ModeDescription

image/svg+xmlThe REPE, REPNE, REPZ, and REPNZ prefixes also check the state of the ZF flag after each iteration and terminate the repeat loop if the ZF flag is not in the specified state. When both termination conditions are tested, the cause of a repeat termination can be determined either by testing the count register with a JECXZ instruction or by testing the ZF flag (with a JZ, JNZ, or JNE instruction).When the REPE/REPZ and REPNE/REPNZ prefixes are used, the ZF flag does not require initialization because both the CMPS and SCAS instructions affect the ZF flag according to the results of the comparisons they make.A repeating string operation can be suspended by an exception or interrupt. When this happens, the state of the registers is preserved to allow the string operation to be resumed upon a return from the exception or interrupt handler. The source and destination registers point to the next string elements to be operated on, the EIP register points to the string instruction, and the ECX register has the value it held following the last successful iteration of the instruction. This mechanism allows long string operations to proceed without affecting the interrupt response time of the system.When a fault occurs during the execution of a CMPS or SCAS instruction that is prefixed with REPE or REPNE, the EFLAGS value is restored to the state prior to the execution of the instruction. Since the SCAS and CMPS instruc-tions do not use EFLAGS as an input, the processor can resume the instruction after the page fault handler.Use the REP INS and REP OUTS instructions with caution. Not all I/O ports can handle the rate at which these instructions execute. Note that a REP STOS instruction is the fastest way to initialize a large block of memory.In 64-bit mode, the operand size of the count register is associated with the address size attribute. Thus the default count register is RCX; REX.W has no effect on the address size and the count register. In 64-bit mode, if 67H is used to override address size attribute, the count register is ECX and any implicit source/destination operand will use the corresponding 32-bit index register. See the summary chart at the beginning of this section for encoding data and limits.REP INS may read from the I/O port without writing to the memory location if an exception or VM exit occurs due to the write (e.g. #PF). If this would be problematic, for example because the I/O port read has side-effects, soft-ware should ensure the write to the memory location does not cause an exception or VM exit.OperationIF AddressSize = 16 THEN Use CX for CountReg; Implicit Source/Dest operand for memory use of SI/DI; ELSE IF AddressSize = 64 THEN Use RCX for CountReg; Implicit Source/Dest operand for memory use of RSI/RDI; ELSE Use ECX for CountReg; Implicit Source/Dest operand for memory use of ESI/EDI;FI;WHILE CountReg ≠ 0DOService pending interrupts (if any);Execute associated string instruction;CountReg := (CountReg – 1);IF CountReg = 0THEN exit WHILE loop; FI;IF (Repeat prefix is REPZ or REPE) and (ZF = 0)or (Repeat prefix is REPNZ or REPNE) and (ZF = 1)THEN exit WHILE loop; FI;OD;Flags AffectedNone; however, the CMPS and SCAS instructions do set the status flags in the EFLAGS register.

image/svg+xmlExceptions (All Operating Modes)Exceptions may be generated by an instruction associated with the prefix.64-Bit Mode Exceptions#GP(0)If the memory address is in a non-canonical form.

This UNOFFICIAL reference was generated from the official Intel® 64 and IA-32 Architectures Software Developer’s Manual by a dumb script. There is no guarantee that some parts aren't mangled or broken and is distributed WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.