PUSH—Push Word, Doubleword or Quadword Onto the StackInstruction Operand EncodingDescriptionDecrements the stack pointer and then stores the source operand on the top of the stack. Address and operand sizes are determined and used as follows:•Address size. The D flag in the current code-segment descriptor determines the default address size; it may be overridden by an instruction prefix (67H).The address size is used only when referencing a source operand in memory.•Operand size. The D flag in the current code-segment descriptor determines the default operand size; it may be overridden by instruction prefixes (66H or REX.W).The operand size (16, 32, or 64 bits) determines the amount by which the stack pointer is decremented (2, 4or 8).If the source operand is an immediate of size less than the operand size, a sign-extended value is pushed onthe stack. If the source operand is a segment register (16 bits) and the operand size is 64-bits, a zero-extended value is pushed on the stack; if the operand size is 32-bits, either a zero-extended value is pushedon the stack or the segment selector is written on the stack using a 16-bit move. For the last case, all recentIntel Core and Intel Atom processors perform a 16-bit move, leaving the upper portion of the stack locationunmodified.Opcode*InstructionOp/ En64-Bit ModeCompat/Leg ModeDescriptionFF /6PUSH r/m16MValidValidPush r/m16.FF /6PUSH r/m32MN.E.ValidPush r/m32.FF /6PUSH r/m64MValidN.E.Push r/m64.50+rwPUSH r16OValid ValidPush r16.50+rdPUSH r32ON.E.ValidPush r32.50+rdPUSH r64OValidN.E.Push r64.6A ibPUSH imm8IValidValidPush imm8.68 iwPUSH imm16IValidValidPush imm16.68 idPUSH imm32IValidValidPush imm32.0EPUSH CSZOInvalidValidPush CS.16PUSH SSZOInvalidValidPush SS.1EPUSH DSZOInvalidValidPush DS.06PUSH ESZOInvalidValidPush ES.0F A0PUSH FSZOValidValidPush FS.0F A8PUSH GSZOValidValidPush GS.NOTES:*See IA-32 Architecture Compatibility section below.Op/EnOperand 1Operand 2Operand 3Operand 4MModRM:r/m (r)NANANAOopcode + rd (r)NANANAIimm8/16/32NANANAZONANANANA
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