PCMPEQQ — Compare Packed Qword Data for EqualInstruction Operand EncodingDescriptionPerforms an SIMD compare for equality of the packed quadwords in the destination operand (first operand) and the source operand (second operand). If a pair of data elements is equal, the corresponding data element in the desti-nation is set to all 1s; otherwise, it is set to 0s.128-bit Legacy SSE version: The second source operand can be an XMM register or a 128-bit memory location. The first source and destination operands are XMM registers. Bits (MAXVL-1:128) of the corresponding YMM destination register remain unchanged.VEX.128 encoded version: The second source operand can be an XMM register or a 128-bit memory location. The first source and destination operands are XMM registers. Bits (MAXVL-1:128) of the corresponding YMM register are zeroed.VEX.256 encoded version: The first source operand is a YMM register. The second source operand is a YMM register or a 256-bit memory location. The destination operand is a YMM register.EVEX encoded VPCMPEQQ: The first source operand (second operand) is a ZMM/YMM/XMM register. The second source operand can be a ZMM/YMM/XMM register, a 512/256/128-bit memory location or a 512/256/128-bit vector broadcasted from a 64-bit memory location. The destination operand (first operand) is a mask register updated according to the writemask k2.Opcode/InstructionOp/ En64/32 bit Mode SupportCPUID Feature FlagDescription66 0F 38 29 /rPCMPEQQ xmm1, xmm2/m128AV/VSSE4_1Compare packed qwords in xmm2/m128 and xmm1 for equality.VEX.128.66.0F38.WIG 29 /rVPCMPEQQ xmm1, xmm2, xmm3/m128BV/VAVXCompare packed quadwords in xmm3/m128and xmm2 for equality.VEX.256.66.0F38.WIG 29 /rVPCMPEQQ ymm1, ymm2, ymm3 /m256BV/VAVX2Compare packed quadwords in ymm3/m256and ymm2 for equality.EVEX.128.66.0F38.W1 29 /rVPCMPEQQ k1 {k2}, xmm2, xmm3/m128/m64bcstCV/VAVX512VLAVX512FCompare Equal between int64 vector xmm2 and int64 vector xmm3/m128/m64bcst, and set vector mask k1 to reflect the zero/nonzero status of each element of the result, under writemask.EVEX.256.66.0F38.W1 29 /rVPCMPEQQ k1 {k2}, ymm2, ymm3/m256/m64bcstCV/VAVX512VLAVX512FCompare Equal between int64 vector ymm2 and int64 vector ymm3/m256/m64bcst, and set vector mask k1 to reflect the zero/nonzero status of each element of the result, under writemask.EVEX.512.66.0F38.W1 29 /rVPCMPEQQ k1 {k2}, zmm2, zmm3/m512/m64bcstCV/VAVX512FCompare Equal between int64 vector zmm2 and int64 vector zmm3/m512/m64bcst, and set vector mask k1 to reflect the zero/nonzero status of each element of the result, under writemask.Op/EnTuple TypeOperand 1Operand 2Operand 3Operand 4ANAModRM:reg (r, w)ModRM:r/m (r)NANABNAModRM:reg (w)VEX.vvvv (r)ModRM:r/m (r)NACFullModRM:reg (w)EVEX.vvvv (r)ModRM:r/m (r)NA
This UNOFFICIAL reference was generated from the official Intel® 64 and IA-32 Architectures Software Developer’s Manual by a dumb script. There is no guarantee that some parts aren't mangled or broken and is distributed WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.