PADDSB/PADDSW—Add Packed Signed Integers with Signed SaturationOpcode/InstructionOp/ En64/32 bit Mode SupportCPUID Feature FlagDescriptionNP 0F EC /r1PADDSB mm, mm/m64AV/V MMXAdd packed signed byte integers from mm/m64 and mm and saturate the results.66 0F EC /rPADDSB xmm1, xmm2/m128AV/VSSE2Add packed signed byte integers from xmm2/m128 and xmm1 saturate the results.NP 0F ED /r1PADDSW mm, mm/m64AV/VMMXAdd packed signed word integers from mm/m64 and mm and saturate the results.66 0F ED /rPADDSW xmm1, xmm2/m128AV/VSSE2Add packed signed word integers fromxmm2/m128 and xmm1 and saturate the results.VEX.128.66.0F.WIG EC /rVPADDSB xmm1, xmm2, xmm3/m128BV/VAVXAdd packed signed byte integers from xmm3/m128 and xmm2 saturate the results.VEX.128.66.0F.WIG ED /rVPADDSW xmm1, xmm2, xmm3/m128BV/VAVXAdd packed signed word integers from xmm3/m128 and xmm2 and saturate the results.VEX.256.66.0F.WIG EC /rVPADDSB ymm1, ymm2, ymm3/m256BV/VAVX2Add packed signed byte integers from ymm2, and ymm3/m256 and store the saturated results in ymm1.VEX.256.66.0F.WIG ED /rVPADDSW ymm1, ymm2, ymm3/m256BV/VAVX2Add packed signed word integers from ymm2, and ymm3/m256 and store the saturated results in ymm1.EVEX.128.66.0F.WIG EC /rVPADDSB xmm1 {k1}{z}, xmm2, xmm3/m128CV/VAVX512VLAVX512BWAdd packed signed byte integers from xmm2, and xmm3/m128 and store the saturated results in xmm1 under writemask k1.EVEX.256.66.0F.WIG EC /rVPADDSB ymm1 {k1}{z}, ymm2, ymm3/m256CV/VAVX512VLAVX512BWAdd packed signed byte integers from ymm2, and ymm3/m256 and store the saturated results in ymm1 under writemask k1.EVEX.512.66.0F.WIG EC /rVPADDSB zmm1 {k1}{z}, zmm2, zmm3/m512CV/VAVX512BWAdd packed signed byte integers from zmm2, and zmm3/m512 and store the saturated results in zmm1 under writemask k1.EVEX.128.66.0F.WIG ED /rVPADDSW xmm1 {k1}{z}, xmm2, xmm3/m128CV/VAVX512VLAVX512BWAdd packed signed word integers from xmm2, and xmm3/m128 and store the saturated results in xmm1 under writemask k1.EVEX.256.66.0F.WIG ED /rVPADDSW ymm1 {k1}{z}, ymm2, ymm3/m256CV/VAVX512VLAVX512BWAdd packed signed word integers from ymm2, and ymm3/m256 and store the saturated results in ymm1 under writemask k1.EVEX.512.66.0F.WIG ED /rVPADDSW zmm1 {k1}{z}, zmm2, zmm3/m512CV/VAVX512BWAdd packed signed word integers from zmm2, and zmm3/m512 and store the saturated results in zmm1 under writemask k1.NOTES:1. See note in Section 2.4, “AVX and SSE Instruction Exception Specification” in the Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 2A and Section 22.25.3, “Exception Conditions of Legacy SIMD Instructions Operating on MMX Registers” in the Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 3A.
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