MOVSD—Move or Merge Scalar Double-Precision Floating-Point ValueInstruction Operand EncodingOpcode/InstructionOp / En64/32 bit Mode SupportCPUID Feature FlagDescriptionF2 0F 10 /rMOVSD xmm1, xmm2AV/VSSE2Move scalar double-precision floating-point value from xmm2 to xmm1 register.F2 0F 10 /rMOVSD xmm1, m64AV/VSSE2Load scalar double-precision floating-point value from m64 to xmm1 register.F2 0F 11 /rMOVSD xmm1/m64, xmm2CV/VSSE2Move scalar double-precision floating-point value from xmm2 register to xmm1/m64.VEX.LIG.F2.0F.WIG 10 /rVMOVSD xmm1, xmm2, xmm3BV/VAVXMerge scalar double-precision floating-point value from xmm2 and xmm3 to xmm1 register.VEX.LIG.F2.0F.WIG 10 /rVMOVSD xmm1, m64DV/VAVXLoad scalar double-precision floating-point value from m64 to xmm1 register.VEX.LIG.F2.0F.WIG 11 /rVMOVSD xmm1, xmm2, xmm3EV/VAVXMerge scalar double-precision floating-point value from xmm2 and xmm3 registers to xmm1.VEX.LIG.F2.0F.WIG 11 /rVMOVSD m64, xmm1CV/VAVXStore scalar double-precision floating-point value from xmm1 register to m64.EVEX.LLIG.F2.0F.W1 10 /rVMOVSD xmm1 {k1}{z}, xmm2, xmm3BV/VAVX512FMerge scalar double-precision floating-point value from xmm2 and xmm3 registers to xmm1 under writemask k1.EVEX.LLIG.F2.0F.W1 10 /rVMOVSD xmm1 {k1}{z}, m64FV/VAVX512FLoad scalar double-precision floating-point value from m64 to xmm1 register under writemask k1.EVEX.LLIG.F2.0F.W1 11 /rVMOVSD xmm1 {k1}{z}, xmm2, xmm3EV/VAVX512FMerge scalar double-precision floating-point value from xmm2 and xmm3 registers to xmm1 under writemask k1.EVEX.LLIG.F2.0F.W1 11 /rVMOVSD m64 {k1}, xmm1GV/VAVX512FStore scalar double-precision floating-point value from xmm1 register to m64 under writemask k1.Op/EnTuple TypeOperand 1Operand 2Operand 3Operand 4ANAModRM:reg (r, w)ModRM:r/m (r)NANABNAModRM:reg (w)VEX.vvvv (r)ModRM:r/m (r)NACNAModRM:r/m (w)ModRM:reg (r)NANADNAModRM:reg (w)ModRM:r/m (r)NANAENAModRM:r/m (w)vvvv (r)ModRM:reg (r)NAFTuple1 ScalarModRM:reg (r, w)ModRM:r/m (r)NANAGTuple1 ScalarModRM:r/m (w)ModRM:reg (r)NANA
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