MOVDQA,VMOVDQA32/64—Move Aligned Packed Integer ValuesOpcode/InstructionOp/En64/32 bit Mode SupportCPUID Feature FlagDescription66 0F 6F /rMOVDQA xmm1, xmm2/m128AV/VSSE2Move aligned packed integer values from xmm2/mem to xmm1. 66 0F 7F /rMOVDQA xmm2/m128, xmm1BV/VSSE2Move aligned packed integer values from xmm1 to xmm2/mem. VEX.128.66.0F.WIG 6F /rVMOVDQA xmm1, xmm2/m128AV/VAVXMove aligned packed integer values from xmm2/mem to xmm1. VEX.128.66.0F.WIG 7F /rVMOVDQA xmm2/m128, xmm1BV/VAVXMove aligned packed integer values from xmm1 to xmm2/mem. VEX.256.66.0F.WIG 6F /rVMOVDQA ymm1, ymm2/m256AV/VAVXMove aligned packed integer values from ymm2/mem to ymm1. VEX.256.66.0F.WIG 7F /rVMOVDQA ymm2/m256, ymm1BV/VAVXMove aligned packed integer values from ymm1 to ymm2/mem.EVEX.128.66.0F.W0 6F /rVMOVDQA32 xmm1 {k1}{z}, xmm2/m128CV/VAVX512VLAVX512FMove aligned packed doubleword integer values from xmm2/m128 to xmm1 using writemask k1.EVEX.256.66.0F.W0 6F /rVMOVDQA32 ymm1 {k1}{z}, ymm2/m256 CV/VAVX512VLAVX512FMove aligned packed doubleword integer values from ymm2/m256 to ymm1 using writemask k1.EVEX.512.66.0F.W0 6F /rVMOVDQA32 zmm1 {k1}{z}, zmm2/m512CV/VAVX512FMove aligned packed doubleword integer values from zmm2/m512 to zmm1 using writemask k1.EVEX.128.66.0F.W0 7F /rVMOVDQA32 xmm2/m128 {k1}{z}, xmm1DV/VAVX512VLAVX512FMove aligned packed doubleword integer values from xmm1 to xmm2/m128 using writemask k1.EVEX.256.66.0F.W0 7F /rVMOVDQA32 ymm2/m256 {k1}{z}, ymm1DV/VAVX512VLAVX512FMove aligned packed doubleword integer values from ymm1 to ymm2/m256 using writemask k1.EVEX.512.66.0F.W0 7F /rVMOVDQA32 zmm2/m512 {k1}{z}, zmm1DV/VAVX512FMove aligned packed doubleword integer values from zmm1 to zmm2/m512 using writemask k1.EVEX.128.66.0F.W1 6F /rVMOVDQA64 xmm1 {k1}{z}, xmm2/m128 CV/VAVX512VLAVX512FMove aligned packed quadword integer values from xmm2/m128 to xmm1 using writemask k1.EVEX.256.66.0F.W1 6F /rVMOVDQA64 ymm1 {k1}{z}, ymm2/m256 CV/VAVX512VLAVX512FMove aligned packed quadword integer values from ymm2/m256 to ymm1 using writemask k1.EVEX.512.66.0F.W1 6F /rVMOVDQA64 zmm1 {k1}{z}, zmm2/m512 CV/VAVX512FMove aligned packed quadword integer values from zmm2/m512 to zmm1 using writemask k1.EVEX.128.66.0F.W1 7F /rVMOVDQA64 xmm2/m128 {k1}{z}, xmm1DV/VAVX512VLAVX512FMove aligned packed quadword integer values from xmm1 to xmm2/m128 using writemask k1.EVEX.256.66.0F.W1 7F /rVMOVDQA64 ymm2/m256 {k1}{z}, ymm1DV/VAVX512VLAVX512FMove aligned packed quadword integer values from ymm1 to ymm2/m256 using writemask k1.EVEX.512.66.0F.W1 7F /rVMOVDQA64 zmm2/m512 {k1}{z}, zmm1DV/VAVX512FMove aligned packed quadword integer values from zmm1 to zmm2/m512 using writemask k1.
This UNOFFICIAL reference was generated from the official Intel® 64 and IA-32 Architectures Software Developer’s Manual by a dumb script. There is no guarantee that some parts aren't mangled or broken and is distributed WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.