image/svg+xmlLZCNT— Count the Number of Leading Zero BitsInstruction Operand EncodingDescription Counts the number of leading most significant zero bits in a source operand (second operand) returning the result into a destination (first operand). LZCNT differs from BSR. For example, LZCNT will produce the operand size when the input operand is zero. It should be noted that on processors that do not support LZCNT, the instruction byte encoding is executed as BSR. In 64-bit mode 64-bit operand size requires REX.W=1. Operationtemp := OperandSize - 1DEST := 0WHILE (temp >= 0) AND (Bit(SRC, temp) = 0)DOtemp := temp - 1DEST := DEST+ 1ODIF DEST = OperandSizeCF := 1ELSECF := 0FIIF DEST = 0ZF := 1ELSEZF := 0FIFlags AffectedZF flag is set to 1 in case of zero output (most significant bit of the source is set), and to 0 otherwise, CF flag is set to 1 if input was zero and cleared otherwise. OF, SF, PF and AF flags are undefined.Intel C/C++ Compiler Intrinsic EquivalentLZCNT:unsigned __int32 _lzcnt_u32(unsigned __int32 src);LZCNT:unsigned __int64 _lzcnt_u64(unsigned __int64 src);Opcode/InstructionOp/ En64/32-bit ModeCPUID Feature FlagDescriptionF3 0F BD /rLZCNT r16, r/m16RMV/VLZCNTCount the number of leading zero bits in r/m16, return result in r16.F3 0F BD /rLZCNT r32, r/m32RMV/VLZCNTCount the number of leading zero bits in r/m32, return result in r32.F3 REX.W 0F BD /rLZCNT r64, r/m64RMV/N.E.LZCNTCount the number of leading zero bits in r/m64, return result in r64.Op/EnOperand 1Operand 2Operand 3Operand 4RMModRM:reg (w)ModRM:r/m (r)NANA

image/svg+xmlProtected Mode Exceptions#GP(0)For an illegal memory operand effective address in the CS, DS, ES, FS or GS segments.If the DS, ES, FS, or GS register is used to access memory and it contains a null segment selector.#SS(0)For an illegal address in the SS segment.#PF (fault-code)For a page fault.#AC(0)If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3.#UDIf LOCK prefix is used.Real-Address Mode Exceptions#GP(0)If any part of the operand lies outside of the effective address space from 0 to 0FFFFH.#SS(0)For an illegal address in the SS segment.#UDIf LOCK prefix is used.Virtual 8086 Mode Exceptions#GP(0)If any part of the operand lies outside of the effective address space from 0 to 0FFFFH.#SS(0)For an illegal address in the SS segment.#PF (fault-code)For a page fault.#AC(0)If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3.#UDIf LOCK prefix is used.Compatibility Mode ExceptionsSame exceptions as in Protected Mode.64-Bit Mode Exceptions#GP(0)If the memory address is in a non-canonical form.#SS(0)If a memory address referencing the SS segment is in a non-canonical form.#PF (fault-code)For a page fault.#AC(0)If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3.#UDIf LOCK prefix is used.

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