image/svg+xmlLSL—Load Segment LimitInstruction Operand EncodingDescriptionLoads the unscrambled segment limit from the segment descriptor specified with the second operand (source operand) into the first operand (destination operand) and sets the ZF flag in the EFLAGS register. The source operand (which can be a register or a memory location) contains the segment selector for the segment descriptor being accessed. The destination operand is a general-purpose register.The processor performs access checks as part of the loading process. Once loaded in the destination register, soft-ware can compare the segment limit with the offset of a pointer. The segment limit is a 20-bit value contained in bytes 0 and 1 and in the first 4 bits of byte 6 of the segment descriptor. If the descriptor has a byte granular segment limit (the granularity flag is set to 0), the destination operand is loaded with a byte granular value (byte limit). If the descriptor has a page granular segment limit (the granularity flag is set to 1), the LSL instruction will translate the page granular limit (page limit) into a byte limit before loading it into the destination operand. The translation is performed by shifting the 20-bit “raw” limit left 12 bits and filling the low-order 12 bits with 1s.When the operand size is 32 bits, the 32-bit byte limit is stored in the destination operand. When the operand size is 16 bits, a valid 32-bit limit is computed; however, the upper 16 bits are truncated and only the low-order 16 bits are loaded into the destination operand.This instruction performs the following checks before it loads the segment limit into the destination register: •Checks that the segment selector is not NULL.•Checks that the segment selector points to a descriptor that is within the limits of the GDT or LDT being accessed•Checks that the descriptor type is valid for this instruction. All code and data segment descriptors are valid for (can be accessed with) the LSL instruction. The valid special segment and gate descriptor types are given in the following table. •If the segment is not a conforming code segment, the instruction checks that the specified segment descriptor is visible at the CPL (that is, if the CPL and the RPL of the segment selector are less than or equal to the DPL of the segment selector).If the segment descriptor cannot be accessed or is an invalid type for the instruction, the ZF flag is cleared and no value is loaded in the destination operand.OpcodeInstructionOp/ En64-Bit ModeCompat/Leg ModeDescription0F 03 /rLSL r16, r16/m16RMValidValidLoad: r16 := segment limit, selector r16/m16.0F 03 /rLSL r32, r32/m16*RMValidValidLoad: r32 := segment limit, selector r32/m16.REX.W + 0F 03 /rLSL r64, r32/m16*RMValidValidLoad: r64 := segment limit, selector r32/m16NOTES:*For all loads (regardless of destination sizing), only bits 16-0 are used. Other bits are ignored.Op/EnOperand 1Operand 2Operand 3Operand 4RMModRM:reg (w)ModRM:r/m (r)NANA

image/svg+xmlOperationIF SRC(Offset) > descriptor table limitTHEN ZF := 0; FI;Read segment descriptor;IF SegmentDescriptor(Type) ≠ conforming code segmentand (CPL > DPL) OR (RPL > DPL)or Segment type is not valid for instructionTHENZF := 0;ELSEtemp := SegmentLimit([SRC]);IF (G := 1)THEN temp := ShiftLeft(12, temp) OR 00000FFFH;ELSE IF OperandSize = 32 THEN DEST := temp; FI;ELSE IF OperandSize = 64 (* REX.W used *)THEN DEST (* Zero-extended *) := temp; FI;ELSE (* OperandSize = 16 *)DEST := temp AND FFFFH;FI;FI;Table 3-56. Segment and Gate Descriptor TypesTypeProtected ModeIA-32e ModeNameValidNameValid0ReservedNoReservedNo1Available 16-bit TSSYesReservedNo2LDTYesLDT1Yes3Busy 16-bit TSSYesReservedNo416-bit call gateNoReservedNo516-bit/32-bit task gateNoReservedNo616-bit interrupt gateNoReservedNo716-bit trap gateNoReservedNo8ReservedNoReservedNo9Available 32-bit TSSYes64-bit TSS1YesAReservedNoReservedNoBBusy 32-bit TSSYesBusy 64-bit TSS1YesC32-bit call gateNo64-bit call gateNoDReservedNoReservedNoE32-bit interrupt gateNo64-bit interrupt gateNoF32-bit trap gateNo64-bit trap gateNoNOTES:1. In this case, the descriptor comprises 16 bytes; bits 12:8 of the upper 4 bytes must be 0.

image/svg+xmlFlags AffectedThe ZF flag is set to 1 if the segment limit is loaded successfully; otherwise, it is set to 0.Protected Mode Exceptions#GP(0)If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.If the DS, ES, FS, or GS register is used to access memory and it contains a NULL segment selector.#SS(0)If a memory operand effective address is outside the SS segment limit.#PF(fault-code)If a page fault occurs.#AC(0)If alignment checking is enabled and the memory operand effective address is unaligned while the current privilege level is 3. #UD If the LOCK prefix is used.Real-Address Mode Exceptions#UDThe LSL instruction cannot be executed in real-address mode.Virtual-8086 Mode Exceptions#UDThe LSL instruction cannot be executed in virtual-8086 mode.Compatibility Mode ExceptionsSame exceptions as in protected mode.64-Bit Mode Exceptions#SS(0)If the memory operand effective address referencing the SS segment is in a non-canonical form.#GP(0)If the memory operand effective address is in a non-canonical form.#PF(fault-code)If a page fault occurs.#AC(0)If alignment checking is enabled and the memory operand effective address is unaligned while the current privilege level is 3.#UD If the LOCK prefix is used.

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