image/svg+xml KNOTW/KNOTB/KNOTQ/KNOTD—NOT Mask Register Instruction Operand Encoding Description Performs a bitwise NOT of vector mask k2 and writes the result into vector mask k1. Operation KNOTW DEST[15:0] := BITWISE NOT SRC[15:0] DEST[MAX_KL-1:16] := 0 KNOTB DEST[7:0] := BITWISE NOT SRC[7:0] DEST[MAX_KL-1:8] := 0 KNOTQ DEST[63:0] := BITWISE NOT SRC[63:0] DEST[MAX_KL-1:64] := 0 KNOTD DEST[31:0] := BITWISE NOT SRC[31:0] DEST[MAX_KL-1:32] := 0 Intel C/C++ Compiler Intrinsic Equivalent KNOTW __mmask16 _mm512_knot(__mmask16 a); Flags Affected None SIMD Floating-Point Exceptions None Other Exceptions See Table2-63, “TYPE K20 Exception Definition (VEX-Encoded OpMask Instructions w/o Memory Arg)”. Opcode/ Instruction Op/En64/32 bit Mode Support CPUID Feature Flag Description VEX.L0.0F.W0 44 /r KNOTW k1, k2 RRV/VAVX512FBitwise NOT of 16 bits mask k2. VEX.L0.66.0F.W0 44 /r KNOTB k1, k2 RRV/VAVX512DQBitwise NOT of 8 bits mask k2. VEX.L0.0F.W1 44 /r KNOTQ k1, k2 RRV/VAVX512BWBitwise NOT of 64 bits mask k2. VEX.L0.66.0F.W1 44 /r KNOTD k1, k2 RRV/VAVX512BWBitwise NOT of 32 bits mask k2. Op/EnOperand 1Operand 2 RRModRM:reg (w)ModRM:r/m (r, ModRM:[7:6] must be 11b) This UNOFFICIAL reference was generated from the official Intel® 64 and IA-32 Architectures Software Developer’s Manual by a dumb script. There is no guarantee that some parts aren't mangled or broken and is distributed WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE .