HSUBPS—Packed Single-FP Horizontal SubtractInstruction Operand EncodingDescriptionSubtracts the single-precision floating-point value in the second dword of the destination operand from the first dword of the destination operand and stores the result in the first dword of the destination operand. Subtracts the single-precision floating-point value in the fourth dword of the destination operand from the third dword of the destination operand and stores the result in the second dword of the destination operand. Subtracts the single-precision floating-point value in the second dword of the source operand from the first dword of the source operand and stores the result in the third dword of the destination operand. Subtracts the single-precision floating-point value in the fourth dword of the source operand from the third dword of the source operand and stores the result in the fourth dword of the destination operand. In 64-bit mode, use of the REX.R prefix permits this instruction to access additional registers (XMM8-XMM15).See Figure3-22 for HSUBPS; see Figure3-23 for VHSUBPS.Opcode/InstructionOp/ En64/32-bit ModeCPUID Feature FlagDescriptionF2 0F 7D /rHSUBPS xmm1,xmm2/m128RMV/VSSE3Horizontal subtract packed single-precision floating-point values from xmm2/m128 to xmm1.VEX.128.F2.0F.WIG 7D /rVHSUBPS xmm1, xmm2, xmm3/m128RVMV/VAVXHorizontal subtract packed single-precision floating-point values from xmm2 and xmm3/mem.VEX.256.F2.0F.WIG 7D /rVHSUBPS ymm1, ymm2, ymm3/m256RVMV/VAVXHorizontal subtract packed single-precision floating-point values from ymm2 and ymm3/mem.Op/EnOperand 1Operand 2Operand 3Operand 4RMModRM:reg (r, w)ModRM:r/m (r)NANARVMModRM:reg (w)VEX.vvvv (r)ModRM:r/m (r)NA
This UNOFFICIAL reference was generated from the official Intel® 64 and IA-32 Architectures Software Developer’s Manual by a dumb script. There is no guarantee that some parts aren't mangled or broken and is distributed WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.