FLD1/FLDL2T/FLDL2E/FLDPI/FLDLG2/FLDLN2/FLDZ—Load ConstantDescriptionPush one of seven commonly used constants (in double extended-precision floating-point format) onto the FPU register stack. The constants that can be loaded with these instructions include +1.0, +0.0, log210, log2e, π, log102, and loge2. For each constant, an internal 66-bit constant is rounded (as specified by the RC field in the FPU control word) to double extended-precision floating-point format. The inexact-result exception (#P) is not generated as a result of the rounding, nor is the C1 flag set in the x87 FPU status word if the value is rounded up. See the section titled “Approximation of Pi” in Chapter 8 of the Intel® 64 and IA-32 Architectures Software Devel-oper’s Manual, Volume 1, for a description of the π constant.This instruction’s operation is the same in non-64-bit modes and 64-bit mode.IA-32 Architecture CompatibilityWhen the RC field is set to round-to-nearest, the FPU produces the same constants that is produced by the Intel 8087 and Intel 287 math coprocessors.OperationTOP := TOP − 1;ST(0) := CONSTANT;FPU Flags AffectedC1Set to 1 if stack overflow occurred; otherwise, set to 0.C0, C2, C3 Undefined.Floating-Point Exceptions#ISStack overflow occurred.Protected Mode Exceptions#NMCR0.EM[bit 2] or CR0.TS[bit 3] = 1.#MF If there is a pending x87 FPU exception.#UD If the LOCK prefix is used.Real-Address Mode ExceptionsSame exceptions as in protected mode.Virtual-8086 Mode ExceptionsSame exceptions as in protected mode.Opcode*Instruction64-Bit ModeCompat/Leg ModeDescriptionD9 E8FLD1ValidValidPush +1.0 onto the FPU register stack.D9 E9FLDL2TValidValidPush log210 onto the FPU register stack.D9 EAFLDL2EValidValidPush log2e onto the FPU register stack.D9 EBFLDPIValidValidPush π onto the FPU register stack.D9 ECFLDLG2ValidValidPush log102 onto the FPU register stack.D9 EDFLDLN2ValidValidPush loge2 onto the FPU register stack.D9 EEFLDZValidValidPush +0.0 onto the FPU register stack.NOTES:*See IA-32 Architecture Compatibility section below.
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