image/svg+xml FISTTP—Store Integer with Truncation Description FISTTP converts the value in ST into a signed integer using truncation (chop) as rounding mode, transfers the result to the destination, and pop ST. FISTTP accepts word, short integer, and long integer destinations. The following table shows the results obtained when storing various classes of numbers in integer format. This instruction’s operation is the same in non-64-bit modes and 64-bit mode. Operation DEST := ST; pop ST; Flags Affected C1 is cleared; C0, C2, C3 undefined. Numeric Exceptions Invalid, Stack Invalid (stack underflow), Precision. Protected Mode Exceptions #GP(0) If the destination is in a nonwritable segment. For an illegal memory operand effective address in the CS, DS, ES, FS or GS segments. #SS(0) For an illegal address in the SS segment. #PF(fault-code) For a page fault. #AC(0)If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3. #NM If CR0.EM[bit 2] = 1. If CR0.TS[bit 3] = 1. #UD If CPUID.01H:ECX.SSE3[bit 0] = 0. If the LOCK prefix is used. OpcodeInstruction64-Bit ModeCompat/ Leg Mode Description DF /1FISTTP m16int ValidValidStore ST(0) in m16int with truncation. DB /1FISTTP m32int ValidValidStore ST(0) in m32int with truncation. DD /1FISTTP m64int ValidValidStore ST(0) in m64int with truncation. Table 3-28. FISTTP Results ST(0)DEST − ∞ or Value Too Large for DEST Format * F ≤ − 1 − I − 1 < F < + 10 F Š + 1 + I + ∞ or Value Too Large for DEST Format * NaN * NOTES: FMeans finite floating-point value. Ι Means integer. ∗ Indicates floating-point invalid-operation (#IA) exception. image/svg+xml Real Address Mode Exceptions GP(0) If any part of the operand would lie outside of the effective address space from 0 to 0FFFFH. #NMIf CR0.EM[bit 2] = 1. If CR0.TS[bit 3] = 1. #UD If CPUID.01H:ECX.SSE3[bit 0] = 0. If the LOCK prefix is used. Virtual 8086 Mode Exceptions GP(0) If any part of the operand would lie outside of the effective address space from 0 to 0FFFFH. #NMIf CR0.EM[bit 2] = 1. If CR0.TS[bit 3] = 1. #UD If CPUID.01H:ECX.SSE3[bit 0] = 0. If the LOCK prefix is used. #PF(fault-code) For a page fault. #AC(0) For unaligned memory reference if the current privilege is 3. Compatibility Mode Exceptions Same exceptions as in protected mode. 64-Bit Mode Exceptions #SS(0)If a memory address referencing the SS segment is in a non-canonical form. #GP(0)If the memory address is in a non-canonical form. #NMCR0.EM[bit 2] or CR0.TS[bit 3] = 1. #MF If there is a pending x87 FPU exception. #PF(fault-code)If a page fault occurs. #AC(0)If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3. If the LOCK prefix is used. This UNOFFICIAL reference was generated from the official Intel® 64 and IA-32 Architectures Software Developer’s Manual by a dumb script. There is no guarantee that some parts aren't mangled or broken and is distributed WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE .