FICOM/FICOMP—Compare IntegerDescriptionCompares the value in ST(0) with an integer source operand and sets the condition code flags C0, C2, and C3 in the FPU status word according to the results (see table below). The integer value is converted to double extended-precision floating-point format before the comparison is made.These instructions perform an “unordered comparison.” An unordered comparison also checks the class of the numbers being compared (see “FXAM—Examine Floating-Point” in this chapter). If either operand is a NaN or is in an undefined format, the condition flags are set to “unordered.”The sign of zero is ignored, so that –0.0:= +0.0.The FICOMP instructions pop the register stack following the comparison. To pop the register stack, the processor marks the ST(0) register empty and increments the stack pointer (TOP) by 1.This instruction’s operation is the same in non-64-bit modes and 64-bit mode.OperationCASE (relation of operands) OFST(0) > SRC:C3, C2, C0 := 000;ST(0) < SRC:C3, C2, C0 := 001;ST(0) = SRC:C3, C2, C0 := 100;Unordered:C3, C2, C0 := 111;ESAC;IF Instruction =FICOMP THEN PopRegisterStack; FI;FPU Flags AffectedC1Set to 0.C0, C2, C3See table on previous page.Floating-Point Exceptions#ISStack underflow occurred.#IAOne or both operands are NaN values or have unsupported formats.#DOne or both operands are denormal values.OpcodeInstruction64-Bit ModeCompat/Leg ModeDescriptionDE /2FICOM m16intValidValidCompare ST(0) with m16int.DA /2FICOM m32intValidValidCompare ST(0) with m32int.DE /3FICOMP m16intValidValidCompare ST(0) with m16int and pop stack register.DA /3FICOMP m32intValidValidCompare ST(0) with m32int and pop stack register.Table 3-26. FICOM/FICOMP ResultsConditionC3C2C0ST(0) > SRC000ST(0)< SRC001ST(0) =SRC100Unordered111
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