FDIV/FDIVP/FIDIV—DivideDescriptionDivides the destination operand by the source operand and stores the result in the destination location. The desti-nation operand (dividend) is always in an FPU register; the source operand (divisor) can be a register or a memory location. Source operands in memory can be in single-precision or double-precision floating-point format, word or doubleword integer format.The no-operand version of the instruction divides the contents of the ST(1) register by the contents of the ST(0) register. The one-operand version divides the contents of the ST(0) register by the contents of a memory location (either a floating-point or an integer value). The two-operand version, divides the contents of the ST(0) register by the contents of the ST(i) register or vice versa.The FDIVP instructions perform the additional operation of popping the FPU register stack after storing the result. To pop the register stack, the processor marks the ST(0) register as empty and increments the stack pointer (TOP) by 1. The no-operand version of the floating-point divide instructions always results in the register stack being popped. In some assemblers, the mnemonic for this instruction is FDIV rather than FDIVP.The FIDIV instructions convert an integer source operand to double extended-precision floating-point format before performing the division. When the source operand is an integer 0, it is treated as a +0.If an unmasked divide-by-zero exception (#Z) is generated, no result is stored; if the exception is masked, an ∞ of the appropriate sign is stored in the destination operand.The following table shows the results obtained when dividing various classes of numbers, assuming that neither overflow nor underflow occurs.OpcodeInstruction64-Bit ModeCompat/Leg ModeDescriptionD8 /6FDIV m32fpValidValidDivide ST(0) by m32fp and store result in ST(0).DC /6FDIV m64fpValidValidDivide ST(0) by m64fp and store result in ST(0).D8 F0+iFDIV ST(0), ST(i)ValidValidDivide ST(0) by ST(i) and store result in ST(0).DC F8+iFDIV ST(i), ST(0)ValidValidDivide ST(i) by ST(0) and store result in ST(i).DE F8+iFDIVP ST(i), ST(0)ValidValidDivide ST(i) by ST(0), store result in ST(i), and pop the register stack.DE F9FDIVPValidValidDivide ST(1) by ST(0), store result in ST(1), and pop the register stack.DA /6FIDIV m32intValidValidDivide ST(0) by m32int and store result in ST(0).DE /6FIDIV m16intValidValidDivide ST(0) by m16int and store result in ST(0).
This UNOFFICIAL reference was generated from the official Intel® 64 and IA-32 Architectures Software Developer’s Manual by a dumb script. There is no guarantee that some parts aren't mangled or broken and is distributed WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.