CVTTPS2DQ—Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Signed Doubleword Integer ValuesInstruction Operand EncodingDescriptionConverts four, eight or sixteen packed single-precision floating-point values in the source operand to four, eight or sixteen signed doubleword integers in the destination operand.When a conversion is inexact, a truncated (round toward zero) value is returned. If a converted result is larger than the maximum signed doubleword integer, the floating-point invalid exception is raised, and if this exception is masked, the indefinite integer value (80000000H) is returned.EVEX encoded versions: The source operand is a ZMM/YMM/XMM register, a 512/256/128-bit memory location or a 512/256/128-bit vector broadcasted from a 32-bit memory location. The destination operand is a ZMM/YMM/XMM register conditionally updated with writemask k1. VEX.256 encoded version: The source operand is a YMM register or 256- bit memory location. The destination operand is a YMM register. The upper bits (MAXVL-1:256) of the corresponding ZMM register destination are zeroed.VEX.128 encoded version: The source operand is an XMM register or 128- bit memory location. The destination operand is a XMM register. The upper bits (MAXVL-1:128) of the corresponding ZMM register destination are zeroed.128-bit Legacy SSE version: The source operand is an XMM register or 128- bit memory location. The destination operand is an XMM register. The upper bits (MAXVL-1:128) of the corresponding ZMM register destination are unmodified.Note: VEX.vvvv and EVEX.vvvv are reserved and must be 1111b otherwise instructions will #UD.Opcode/InstructionOp / En64/32 bit Mode SupportCPUID Feature FlagDescriptionF3 0F 5B /rCVTTPS2DQ xmm1, xmm2/m128AV/VSSE2Convert four packed single-precision floating-point values from xmm2/mem to four packed signed doubleword values in xmm1 using truncation.VEX.128.F3.0F.WIG 5B /rVCVTTPS2DQ xmm1, xmm2/m128AV/VAVXConvert four packed single-precision floating-point values from xmm2/mem to four packed signed doubleword values in xmm1 using truncation.VEX.256.F3.0F.WIG 5B /rVCVTTPS2DQ ymm1, ymm2/m256AV/VAVXConvert eight packed single-precision floating-point values from ymm2/mem to eight packed signed doubleword values in ymm1 using truncation.EVEX.128.F3.0F.W0 5B /rVCVTTPS2DQ xmm1 {k1}{z}, xmm2/m128/m32bcstBV/VAVX512VLAVX512FConvert four packed single precision floating-point values from xmm2/m128/m32bcst to four packed signed doubleword values in xmm1 using truncation subject to writemask k1.EVEX.256.F3.0F.W0 5B /rVCVTTPS2DQ ymm1 {k1}{z}, ymm2/m256/m32bcstBV/VAVX512VLAVX512FConvert eight packed single precision floating-point values from ymm2/m256/m32bcst to eight packed signed doubleword values in ymm1 using truncation subject to writemask k1.EVEX.512.F3.0F.W0 5B /rVCVTTPS2DQ zmm1 {k1}{z}, zmm2/m512/m32bcst {sae}BV/VAVX512FConvert sixteen packed single-precision floating-point values from zmm2/m512/m32bcst to sixteen packed signed doubleword values in zmm1 using truncation subject to writemask k1.Op/EnTuple TypeOperand 1Operand 2Operand 3Operand 4ANAModRM:reg (w)ModRM:r/m (r)NANABFullModRM:reg (w)ModRM:r/m (r)NANA
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