CVTPS2PD—Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point ValuesInstruction Operand EncodingDescriptionConverts two, four or eight packed single-precision floating-point values in the source operand (second operand) to two, four or eight packed double-precision floating-point values in the destination operand (first operand). EVEX encoded versions: The source operand is a YMM/XMM/XMM (low 64-bits) register, a 256/128/64-bit memory location or a 256/128/64-bit vector broadcasted from a 32-bit memory location. The destination operand is a ZMM/YMM/XMM register conditionally updated with writemask k1. VEX.256 encoded version: The source operand is an XMM register or 128- bit memory location. The destination operand is a YMM register. Bits (MAXVL-1:256) of the corresponding destination ZMM register are zeroed.VEX.128 encoded version: The source operand is an XMM register or 64- bit memory location. The destination operand is a XMM register. The upper Bits (MAXVL-1:128) of the corresponding ZMM register destination are zeroed.128-bit Legacy SSE version: The source operand is an XMM register or 64- bit memory location. The destination operand is an XMM register. The upper Bits (MAXVL-1:128) of the corresponding ZMM register destination are unmodified.Note: VEX.vvvv and EVEX.vvvv are reserved and must be 1111b otherwise instructions will #UD.Opcode/InstructionOp / En64/32 bit Mode SupportCPUID Feature FlagDescriptionNP 0F 5A /rCVTPS2PD xmm1, xmm2/m64AV/VSSE2Convert two packed single-precision floating-point values in xmm2/m64 to two packed double-precision floating-point values in xmm1.VEX.128.0F.WIG 5A /rVCVTPS2PD xmm1, xmm2/m64AV/VAVXConvert two packed single-precision floating-point values in xmm2/m64 to two packed double-precision floating-point values in xmm1.VEX.256.0F.WIG 5A /rVCVTPS2PD ymm1, xmm2/m128AV/VAVXConvert four packed single-precision floating-point values in xmm2/m128 to four packed double-precision floating-point values in ymm1.EVEX.128.0F.W0 5A /rVCVTPS2PD xmm1 {k1}{z}, xmm2/m64/m32bcst BV/VAVX512VLAVX512FConvert two packed single-precision floating-point values in xmm2/m64/m32bcst to packed double-precision floating-point values in xmm1 with writemask k1.EVEX.256.0F.W0 5A /rVCVTPS2PD ymm1 {k1}{z}, xmm2/m128/m32bcst BV/VAVX512VLConvert four packed single-precision floating-point values in xmm2/m128/m32bcst to packed double-precision floating-point values in ymm1 with writemask k1.EVEX.512.0F.W0 5A /rVCVTPS2PD zmm1 {k1}{z}, ymm2/m256/m32bcst{sae} BV/VAVX512FConvert eight packed single-precision floating-point values in ymm2/m256/b32bcst to eight packed double-precision floating-point values in zmm1 with writemask k1.Op/EnTuple TypeOperand 1Operand 2Operand 3Operand 4ANAModRM:reg (w)ModRM:r/m (r)NANABHalfModRM:reg (w)ModRM:r/m (r)NANA
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