CMPXCHG—Compare and ExchangeInstruction Operand EncodingDescriptionCompares the value in the AL, AX, EAX, or RAX register with the first operand (destination operand). If the two values are equal, the second operand (source operand) is loaded into the destination operand. Otherwise, the destination operand is loaded into the AL, AX, EAX or RAX register. RAX register is available only in 64-bit mode.This instruction can be used with a LOCK prefix to allow the instruction to be executed atomically. To simplify the interface to the processor’s bus, the destination operand receives a write cycle without regard to the result of the comparison. The destination operand is written back if the comparison fails; otherwise, the source operand is written into the destination. (The processor never produces a locked read without also producing a locked write.)In 64-bit mode, the instruction’s default operation size is 32 bits. Use of the REX.R prefix permits access to addi-tional registers (R8-R15). Use of the REX.W prefix promotes operation to 64 bits. See the summary chart at the beginning of this section for encoding data and limits.IA-32 Architecture CompatibilityThis instruction is not supported on Intel processors earlier than the Intel486 processors.Operation(* Accumulator = AL, AX, EAX, or RAX depending on whether a byte, word, doubleword, or quadword comparison is being performed *)TEMP := DESTIF accumulator = TEMPTHENZF := 1;DEST := SRC;ELSEZF := 0;accumulator := TEMP;DEST := TEMP;FI;Opcode/InstructionOp/ En64-Bit ModeCompat/Leg ModeDescription0F B0/rCMPXCHG r/m8, r8MRValidValid*Compare AL with r/m8. If equal, ZF is set and r8 is loaded into r/m8. Else, clear ZF and load r/m8 into AL.REX + 0F B0/rCMPXCHG r/m8**,r8MRValidN.E.Compare AL with r/m8. If equal, ZF is set and r8 is loaded into r/m8. Else, clear ZF and load r/m8 into AL.0F B1/rCMPXCHG r/m16, r16MRValidValid*Compare AX with r/m16. If equal, ZF is set and r16 is loaded into r/m16. Else, clear ZF and load r/m16 into AX.0F B1/rCMPXCHG r/m32, r32MRValidValid*Compare EAX with r/m32. If equal, ZF is set and r32 is loaded into r/m32. Else, clear ZF and load r/m32 into EAX.REX.W + 0F B1/rCMPXCHG r/m64, r64MRValidN.E.Compare RAX with r/m64. If equal, ZF is set and r64 is loaded into r/m64. Else, clear ZF and load r/m64 into RAX.NOTES:*See the IA-32 Architecture Compatibility section below. **In 64-bit mode, r/m8 can not be encoded to access the following byte registers if a REX prefix is used: AH, BH, CH, DH. Op/EnOperand 1Operand 2Operand 3Operand 4MRModRM:r/m (r, w)ModRM:reg (r)NANA
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