image/svg+xmlCMP—Compare Two OperandsInstruction Operand EncodingDescriptionCompares the first source operand with the second source operand and sets the status flags in the EFLAGS register according to the results. The comparison is performed by subtracting the second operand from the first operand and then setting the status flags in the same manner as the SUB instruction. When an immediate value is used as an operand, it is sign-extended to the length of the first operand.The condition codes used by the Jcc, CMOVcc, and SETcc instructions are based on the results of a CMP instruction. Appendix B, “EFLAGS Condition Codes,” in the Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 1, shows the relationship of the status flags and the condition codes.OpcodeInstructionOp/ En64-Bit ModeCompat/Leg ModeDescription3C ibCMP AL, imm8IValidValidCompare imm8 with AL.3D iwCMP AX, imm16IValidValidCompare imm16 with AX.3D idCMP EAX, imm32IValidValidCompare imm32 with EAX.REX.W + 3D idCMP RAX, imm32IValidN.E.Compare imm32 sign-extended to 64-bits with RAX.80 /7 ibCMP r/m8, imm8MIValidValidCompare imm8 with r/m8.REX + 80 /7 ibCMP r/m8*, imm8MIValidN.E.Compare imm8 with r/m8.81 /7 iwCMP r/m16, imm16MIValidValidCompare imm16 with r/m16.81 /7 idCMP r/m32, imm32MIValidValidCompare imm32 with r/m32.REX.W + 81 /7 idCMP r/m64, imm32MIValidN.E.Compare imm32 sign-extended to 64-bits with r/m64.83 /7 ibCMP r/m16, imm8MIValidValidCompare imm8 with r/m16.83 /7 ibCMP r/m32, imm8MIValidValidCompare imm8 with r/m32.REX.W + 83 /7 ibCMP r/m64, imm8MIValidN.E.Compare imm8 with r/m64.38 /rCMP r/m8, r8MRValidValidCompare r8 with r/m8.REX + 38 /rCMP r/m8*, r8*MRValidN.E.Compare r8 with r/m8.39 /rCMP r/m16, r16MRValidValidCompare r16 with r/m16.39 /rCMP r/m32, r32MRValidValidCompare r32 with r/m32.REX.W + 39 /rCMP r/m64,r64MRValidN.E.Compare r64 with r/m64.3A /rCMP r8, r/m8RMValidValidCompare r/m8 with r8.REX + 3A /rCMP r8*, r/m8*RMValidN.E.Compare r/m8 with r8.3B /rCMP r16, r/m16RMValidValidCompare r/m16 with r16.3B /rCMP r32, r/m32RMValidValidCompare r/m32 with r32.REX.W + 3B /rCMP r64, r/m64RMValidN.E.Compare r/m64 with r64.NOTES:*In 64-bit mode, r/m8 can not be encoded to access the following byte registers if a REX prefix is used: AH, BH, CH, DH. Op/EnOperand 1Operand 2Operand 3Operand 4RMModRM:reg (r)ModRM:r/m (r)NANAMRModRM:r/m (r)ModRM:reg (r)NANAMIModRM:r/m (r)imm8/16/32NANAIAL/AX/EAX/RAX (r)imm8/16/32NANA

image/svg+xmlIn 64-bit mode, the instruction’s default operation size is 32 bits. Use of the REX.R prefix permits access to addi-tional registers (R8-R15). Use of the REX.W prefix promotes operation to 64 bits. See the summary chart at the beginning of this section for encoding data and limits.Operationtemp := SRC1 − SignExtend(SRC2); ModifyStatusFlags; (* Modify status flags in the same manner as the SUB instruction*)Flags AffectedThe CF, OF, SF, ZF, AF, and PF flags are set according to the result.Protected Mode Exceptions#GP(0)If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.If the DS, ES, FS, or GS register contains a NULL segment selector.#SS(0)If a memory operand effective address is outside the SS segment limit.#PF(fault-code)If a page fault occurs.#AC(0)If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3.#UD If the LOCK prefix is used.Real-Address Mode Exceptions#GPIf a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.#SSIf a memory operand effective address is outside the SS segment limit.Virtual-8086 Mode Exceptions#GP(0)If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.#SS(0)If a memory operand effective address is outside the SS segment limit.#PF(fault-code)If a page fault occurs.#AC(0)If alignment checking is enabled and an unaligned memory reference is made.#UD If the LOCK prefix is used.Compatibility Mode ExceptionsSame exceptions as in protected mode.64-Bit Mode Exceptions#SS(0)If a memory address referencing the SS segment is in a non-canonical form.#GP(0)If the memory address is in a non-canonical form.#PF(fault-code)If a page fault occurs.#AC(0)If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3.#UD If the LOCK prefix is used.

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