image/svg+xml CLAC—Clear AC Flag in EFLAGS Register Instruction Operand Encoding Description Clears the AC flag bit in EFLAGS register. This disables any alignment checking of user-mode data accesses. If the SMAP bit is set in the CR4 register, this disallows explicit supervisor-mode data accesses to user-mode pages. This instruction's operation is the same in non-64-bit modes and 64-bit mode. Attempts to execute CLAC when CPL> 0 cause #UD. Operation EFLAGS.AC := 0; Flags Affected AC cleared. Other flags are unaffected. Protected Mode Exceptions #UD If the LOCK prefix is used. If the CPL > 0. If CPUID.(EAX=07H, ECX=0H):EBX.SMAP[bit 20] = 0. Real-Address Mode Exceptions #UD If the LOCK prefix is used. If CPUID.(EAX=07H, ECX=0H):EBX.SMAP[bit 20] = 0. Virtual-8086 Mode Exceptions #UD The CLAC instruction is not recognized in virtual-8086 mode. Compatibility Mode Exceptions #UD If the LOCK prefix is used. If the CPL > 0. If CPUID.(EAX=07H, ECX=0H):EBX.SMAP[bit 20] = 0. 64-Bit Mode Exceptions #UD If the LOCK prefix is used. If the CPL > 0. If CPUID.(EAX=07H, ECX=0H):EBX.SMAP[bit 20] = 0. Opcode/ Instruction Op / En 64/32 bit Mode Support CPUID Feature Flag Description NP 0F 01 CA CLAC ZOV/VSMAPClear the AC flag in the EFLAGS register. Op/EnOperand 1Operand 2Operand 3Operand 4 ZONANANANA This UNOFFICIAL reference was generated from the official Intel® 64 and IA-32 Architectures Software Developer’s Manual by a dumb script. There is no guarantee that some parts aren't mangled or broken and is distributed WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE .