image/svg+xmlAESKEYGENASSIST—AES Round Key Generation AssistInstruction Operand EncodingDescriptionAssist in expanding the AES cipher key, by computing steps towards generating a round key for encryption, using 128-bit data specified in the source operand and an 8-bit round constant specified as an immediate, store the result in the destination operand.The destination operand is an XMM register. The source operand can be an XMM register or a 128-bit memory loca-tion.128-bit Legacy SSE version: Bits (MAXVL-1:128) of the corresponding YMM destination register remain unchanged.VEX.128 encoded version: Bits (MAXVL-1:128) of the destination YMM register are zeroed.Note: In VEX-encoded versions, VEX.vvvv is reserved and must be 1111b, otherwise instructions will #UD.OperationAESKEYGENASSISTX3[31:0] := SRC [127: 96];X2[31:0] := SRC [95: 64];X1[31:0] := SRC [63: 32];X0[31:0] := SRC [31: 0];RCON[31:0] := ZeroExtend(Imm8[7:0]);DEST[31:0] := SubWord(X1);DEST[63:32 ] := RotWord( SubWord(X1) ) XOR RCON;DEST[95:64] := SubWord(X3);DEST[127:96] := RotWord( SubWord(X3) ) XOR RCON;DEST[MAXVL-1:128] (Unmodified)Opcode/InstructionOp/ En64/32-bit ModeCPUID Feature FlagDescription66 0F 3A DF /r ibAESKEYGENASSIST xmm1, xmm2/m128, imm8RMIV/VAESAssist in AES round key generation using an 8 bits Round Constant (RCON) specified in the immediate byte, operating on 128 bits of data specified in xmm2/m128 and stores the result in xmm1.VEX.128.66.0F3A.WIG DF /r ibVAESKEYGENASSIST xmm1, xmm2/m128, imm8RMIV/VBoth AES andAVX flagsAssist in AES round key generation using 8 bits Round Constant (RCON) specified in the immediate byte, operating on 128 bits of data specified in xmm2/m128 and stores the result in xmm1.Op/EnOperand 1Operand2Operand3Operand4RMIModRM:reg (w)ModRM:r/m (r)imm8NA

image/svg+xmlVAESKEYGENASSIST X3[31:0] := SRC [127: 96];X2[31:0] := SRC [95: 64];X1[31:0] := SRC [63: 32];X0[31:0] := SRC [31: 0];RCON[31:0] := ZeroExtend(Imm8[7:0]);DEST[31:0] := SubWord(X1);DEST[63:32 ] := RotWord( SubWord(X1) ) XOR RCON;DEST[95:64] := SubWord(X3);DEST[127:96] := RotWord( SubWord(X3) ) XOR RCON;DEST[MAXVL-1:128] := 0;Intel C/C++ Compiler Intrinsic Equivalent(V)AESKEYGENASSIST:__m128i _mm_aeskeygenassist (__m128i, const int)SIMD Floating-Point ExceptionsNoneOther ExceptionsSee Table2-21, “Type 4 Class Exception Conditions”; additionally:#UDIf VEX.vvvv ≠ 1111B.

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