image/svg+xmlAESDECLAST—Perform Last Round of an AES Decryption FlowInstruction Operand EncodingDescriptionThis instruction performs the last round of the AES decryption flow using the Equivalent Inverse Cipher, using one/two/four (depending on vector length) 128-bit data (state) from the first source operand with one/two/four (depending on vector length) round key(s) from the second source operand, and stores the result in the destination operand. VEX and EVEX encoded versions of the instruction allow 3-operand (non-destructive) operation. The legacy encoded versions of the instruction require that the first source operand and the destination operand are the same and must be an XMM register.The EVEX encoded form of this instruction does not support memory fault suppression.Opcode/InstructionOp/ En64/32-bit ModeCPUID Feature FlagDescription66 0F 38 DF /rAESDECLAST xmm1, xmm2/m128AV/VAESPerform the last round of an AES decryption flow, using the Equivalent Inverse Cipher, using one 128-bit data (state) from xmm1 with one 128-bit round key from xmm2/m128.VEX.128.66.0F38.WIG DF /rVAESDECLAST xmm1, xmm2, xmm3/m128BV/VAESAVXPerform the last round of an AES decryption flow, using the Equivalent Inverse Cipher, using one 128-bit data (state) from xmm2 with one 128-bit round key from xmm3/m128; store the result in xmm1.VEX.256.66.0F38.WIG DF /r VAESDECLAST ymm1, ymm2, ymm3/m256BV/VVAESPerform the last round of an AES decryption flow, using the Equivalent Inverse Cipher, using two 128-bit data (state) from ymm2 with two 128-bit round keys from ymm3/m256; store the result in ymm1.EVEX.128.66.0F38.WIG DF /rVAESDECLAST xmm1, xmm2, xmm3/m128CV/VVAESAVX512VLPerform the last round of an AES decryption flow, using the Equivalent Inverse Cipher, using one 128-bit data (state) from xmm2 with one 128-bit round key from xmm3/m128; store the result in xmm1.EVEX.256.66.0F38.WIG DF /rVAESDECLAST ymm1, ymm2, ymm3/m256CV/VVAESAVX512VLPerform the last round of an AES decryption flow, using the Equivalent Inverse Cipher, using two 128-bit data (state) from ymm2 with two 128-bit round keys from ymm3/m256; store the result in ymm1.EVEX.512.66.0F38.WIG DF /rVAESDECLAST zmm1, zmm2, zmm3/m512CV/VVAESAVX512FPerform the last round of an AES decryption flow, using the Equivalent Inverse Cipher, using four128-bit data (state) from zmm2 with four 128-bit round keys from zmm3/m512; store the result in zmm1.Op/EnTupleOperand 1Operand 2Operand 3Operand 4ANAModRM:reg (r, w)ModRM:r/m (r)NANABNAModRM:reg (w)VEX.vvvv (r)ModRM:r/m (r)NACFull MemModRM:reg (w)EVEX.vvvv (r)ModRM:r/m (r)NA

image/svg+xmlOperationAESDECLAST STATE := SRC1;RoundKey := SRC2;STATE := InvShiftRows( STATE );STATE := InvSubBytes( STATE );DEST[127:0] := STATE XOR RoundKey;DEST[MAXVL-1:128] (Unmodified)VAESDECLAST (128b and 256b VEX encoded versions)(KL,VL) = (1,128), (2,256)FOR i = 0 to KL-1:STATE := SRC1.xmm[i]RoundKey := SRC2.xmm[i]STATE := InvShiftRows( STATE )STATE := InvSubBytes( STATE )DEST.xmm[i] := STATE XOR RoundKeyDEST[MAXVL-1:VL] := 0VAESDECLAST (EVEX encoded version)(KL,VL) = (1,128), (2,256), (4,512)FOR i = 0 to KL-1:STATE := SRC1.xmm[i]RoundKey := SRC2.xmm[i]STATE := InvShiftRows( STATE )STATE := InvSubBytes( STATE )DEST.xmm[i] := STATE XOR RoundKeyDEST[MAXVL-1:VL] := 0Intel C/C++ Compiler Intrinsic Equivalent(V)AESDECLAST__m128i _mm_aesdeclast (__m128i, __m128i)VAESDECLAST__m256i _mm256_aesdeclast_epi128(__m256i, __m256i);VAESDECLAST__m512i _mm512_aesdeclast_epi128(__m512i, __m512i);SIMD Floating-Point ExceptionsNoneOther ExceptionsSee Table2-21, “Type 4 Class Exception Conditions”.EVEX-encoded: See Table2-50, “Type E4NF Class Exception Conditions”.

This UNOFFICIAL reference was generated from the official Intel® 64 and IA-32 Architectures Software Developer’s Manual by a dumb script. There is no guarantee that some parts aren't mangled or broken and is distributed WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.