image/svg+xmlAESDEC—Perform One Round of an AES Decryption FlowInstruction Operand EncodingDescriptionThis instruction performs a single round of the AES decryption flow using the Equivalent Inverse Cipher, using one/two/four (depending on vector length) 128-bit data (state) from the first source operand with one/two/four (depending on vector length) round key(s) from the second source operand, and stores the result in the destination operand. Use the AESDEC instruction for all but the last decryption round. For the last decryption round, use the AESDE-CLAST instruction.VEX and EVEX encoded versions of the instruction allow 3-operand (non-destructive) operation. The legacy encoded versions of the instruction require that the first source operand and the destination operand are the same and must be an XMM register.The EVEX encoded form of this instruction does not support memory fault suppression.Opcode/InstructionOp/ En64/32-bit ModeCPUID Feature FlagDescription66 0F 38 DE /r AESDEC xmm1, xmm2/m128AV/VAESPerform one round of an AES decryption flow, using the Equivalent Inverse Cipher, using one 128-bit data (state) from xmm1 with one 128-bit round key from xmm2/m128.VEX.128.66.0F38.WIG DE /rVAESDEC xmm1, xmm2, xmm3/m128BV/VAES AVXPerform one round of an AES decryption flow, using the Equivalent Inverse Cipher, using one 128-bit data (state) from xmm2 with one 128-bit round key from xmm3/m128; store the result in xmm1.VEX.256.66.0F38.WIG DE /r VAESDEC ymm1, ymm2, ymm3/m256BV/VVAESPerform one round of an AES decryption flow, using the Equivalent Inverse Cipher, using two 128-bit data (state) from ymm2 with two 128-bit round keys from ymm3/m256; store the result in ymm1.EVEX.128.66.0F38.WIG DE /rVAESDEC xmm1, xmm2, xmm3/m128CV/VVAESAVX512VLPerform one round of an AES decryption flow, using the Equivalent Inverse Cipher, using one 128-bit data (state) from xmm2 with one 128-bit round key from xmm3/m128; store the result in xmm1.EVEX.256.66.0F38.WIG DE /rVAESDEC ymm1, ymm2, ymm3/m256CV/VVAESAVX512VLPerform one round of an AES decryption flow, using the Equivalent Inverse Cipher, using two 128-bit data (state) from ymm2 with two 128-bit round keys from ymm3/m256; store the result in ymm1.EVEX.512.66.0F38.WIG DE /rVAESDEC zmm1, zmm2, zmm3/m512CV/VVAESAVX512FPerform one round of an AES decryption flow, using the Equivalent Inverse Cipher, using four 128-bit data (state) from zmm2 with four 128-bit round keys from zmm3/m512; store the result in zmm1.Op/EnTupleOperand 1Operand 2Operand 3Operand 4ANAModRM:reg (r, w)ModRM:r/m (r)NANABNAModRM:reg (w)VEX.vvvv (r)ModRM:r/m (r)NACFull MemModRM:reg (w)EVEX.vvvv (r)ModRM:r/m (r)NA

image/svg+xmlOperationAESDEC STATE := SRC1;RoundKey := SRC2;STATE := InvShiftRows( STATE );STATE := InvSubBytes( STATE );STATE := InvMixColumns( STATE );DEST[127:0] := STATE XOR RoundKey;DEST[MAXVL-1:128] (Unmodified)VAESDEC (128b and 256b VEX encoded versions)(KL,VL) = (1,128), (2,256)FOR i = 0 to KL-1:STATE := SRC1.xmm[i]RoundKey := SRC2.xmm[i]STATE := InvShiftRows( STATE )STATE := InvSubBytes( STATE )STATE := InvMixColumns( STATE )DEST.xmm[i] := STATE XOR RoundKeyDEST[MAXVL-1:VL] := 0VAESDEC (EVEX encoded version)(KL,VL) = (1,128), (2,256), (4,512)FOR i = 0 to KL-1:STATE := SRC1.xmm[i]RoundKey := SRC2.xmm[i]STATE := InvShiftRows( STATE )STATE := InvSubBytes( STATE )STATE := InvMixColumns( STATE )DEST.xmm[i] := STATE XOR RoundKeyDEST[MAXVL-1:VL] :=0Intel C/C++ Compiler Intrinsic Equivalent(V)AESDEC__m128i _mm_aesdec (__m128i, __m128i)VAESDEC__m256i _mm256_aesdec_epi128(__m256i, __m256i);VAESDEC__m512i _mm512_aesdec_epi128(__m512i, __m512i);SIMD Floating-Point ExceptionsNoneOther ExceptionsSee Table2-21, “Type 4 Class Exception Conditions”.EVEX-encoded: See Table2-50, “Type E4NF Class Exception Conditions”.

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